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SN74GTLPH16927GR Scheda tecnica(PDF) 8 Page - Texas Instruments |
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SN74GTLPH16927GR Scheda tecnica(HTML) 8 Page - Texas Instruments |
8 / 19 page SN74GTLPH16927 18-BIT LVTTL-TO-GTLP BUS TRANSCEIVER WITH SOURCE-SYNCHRONOUS CLOCK OUTPUTS SCES413 – OCTOBER 2002 8 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 electrical characteristics over recommended operating free-air temperature range for GTLP (unless otherwise noted) PARAMETER TEST CONDITIONS MIN TYP† MAX UNIT VIK VCC = 3.15 V, II = –18 mA –1.2 V At d VCC = 3.15 V to 3.45 V, IOH = –100 µA VCC–0.2 VOH A port and CLKOUT VCC = 3 15 V IOH = –12 mA 2.4 V CLKOUT VCC = 3.15 V IOH = –24 mA 2 At d VCC = 3.15 V to 3.45 V, IOL = 100 µA 0.2 A port and CLKOUT VCC = 3 15 V IOL = 12 mA 0.4 CLKOUT VCC = 3.15 V IOL = 24 mA 0.5 VOL VCC = 3.15 V to 3.45 V, IOL = 100 µA 0.2 V B port and SSCLK IOL = 10 mA 0.2 B port and SSCLK VCC = 3.15 V IOL = 40 mA 0.4 IOL = 50 mA 0.55 II SYSCLK and control inputs VCC = 3.45 V, VI = 0 to 5.5 V ±10 µA I ‡ B port and SSCLK VCC = 3.45 V, VREF within 0.6 V of VTT, VO = 0 to 2.3 V ±10 µA IOZ‡ CLKOUT VCC = 3.45 V, VO = 0 to 5.5 V ±10 µA IOZH‡ A port VCC = 3.45 V, VO = VCC 10 µA IOZL‡ A port VCC = 3.45 V, VO = GND –10 µA IBHL§ A port VCC = 3.15 V, VI = 0.8 V 75 µA IBHH¶ A port VCC = 3.15 V, VI = 2 V –75 µA IBHLO# A port VCC = 3.45 V, VI = 0 to VCC 500 µA IBHHO|| A port VCC = 3.45 V, VI = 0 to VCC –500 µA At Bt VCC = 3.45 V, IO = 0, Outputs high 50 ICC A port, B port, or SSCLK VCC = 3.45 V, IO = 0, VI (A-port or control input) = VCC or GND, Outputs low 50 mA SSCLK VI (B port) = VTT or GND Outputs disabled 50 ∆ICCk VCC = 3.45 V, One A-port or control input at VCC – 0.6 V, Other A-port or control inputs at VCC or GND 1.5 mA Ci SYSCLK inputs VI = 3.15 V or 0 3.5 5 pF Ci Control inputs VI = 3.15 V or 0 3.5 5.5 pF Ci A port VO = 3.15 V or 0 7.5 10 pF Cio B port or SSCLK VO = 1.5 V or 0 9 11 pF Co CLKOUT VO = 3.15 V or 0 6 7.5 pF † All typical values are at VCC = 3.3 V, TA = 25°C. ‡ For I/O ports, the parameter II includes the off-state output leakage current. § The bus-hold circuit can sink at least the minimum low sustaining current at VILmax. IBHL should be measured after lowering VIN to GND and then raising it to VILmax. ¶ The bus-hold circuit can source at least the minimum high sustaining current at VIHmin. IBHH should be measured after raising VIN to VCC and then lowering it to VIHmin. # An external driver must source at least IBHLO to switch this node from low to high. || An external driver must sink at least IBHHO to switch this node from high to low. k This is the increase in supply current for each input that is at the specified TTL voltage level, rather than V CC or GND. |
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