CDB42406 datasheet(11/32 Pages) CIRRUS

Il numero della parte	CDB42406

Spiegazioni elettronici	Evaluation Board

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Produttore elettronici	CIRRUS [Cirrus Logic]

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CDB42406

11

1.7.3a

Setup 7

An external DSP connected to DSP I/O HDR masters all clocks for the ADC/DAC and pro-

vides data to the DAC. Subclocks for the ADC/DAC are input via DSP_ADC_LRCK and

DSP_ADC_SCLK. For implementation of this setup option, set DIP switch S4 (SW[3:0])

to ‘0111’b.

1.7.3b

Setup 8

Using the on-board crystal oscillator, AUDIO MCLK, a DSP connected to DSP I/O HDR

masters the subclocks for the ADC/DAC and provides data to the DAC. Subclocks for the

ADC/DAC are input via DSP_ADC_LRCK and DSP_ADC_SCLK. For implementation of

this setup option, set DIP switch S4 (SW[3:0]) to ‘1000’b.

AU DIO

MCLK

MC LK

DAC_LRCK/

DAC_SC LK

ADC_L RCK/

ADC_SC LK

DAC_SD INx

AD C_ SDO U T

CS42406

DSP I/O

HD R

DSP_ MC LK

DSP_ ADC_L RCK/

DSP_ ADC_SC LK

D SP_SDO U T

DSP_ DAC_L RCK/

DSP_ DAC_SC LK

D SP_SD IN x

CS8406

C S8416

RM CK

OMC K

OL RC K/

OSC LK

SDO U T

OM CK

IL RC K/

ISC LK

SD IN

Figure 8. DSP Routing - Setup 7

AU DIO

MC LK

MCLK

DAC _LRCK/

DAC _SCLK

AD C_LRCK /

AD C_SC LK

DAC _SDINx

ADC _SDOU T

CS42406

DS P I/O

HD R

DS P_M CLK

DS P_AD C_LRCK /

DS P_AD C_SCLK

DS P_SD OUT

DS P_DA C_LRCK /

DS P_DA C_SCLK

DSP _SDIN x

CS 8406

C S8416

RM CK

OM C K

OLRC K/

OSC LK

SD OUT

OM C K

ILRCK /

ISCLK

SD IN

Figure 9. DSP Routing - Setup 8

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