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SN74GTLPH1612DGGR Scheda tecnica(PDF) 10 Page - Texas Instruments

Il numero della parte SN74GTLPH1612DGGR
Spiegazioni elettronici  18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE UNIVERSAL BUS TRANSCEIVER
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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SN74GTLPH1612DGGR Scheda tecnica(HTML) 10 Page - Texas Instruments

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PARAMETER MEASUREMENT INFORMATION
From Output
Under Test
CL = 50 pF
(see Note A)
LOAD CIRCUIT FOR A OUTPUTS
S1
Open
GND
500
500
TEST
tPLH/tPHL
tPLZ/tPZL
tPHZ/tPZH
S1
Open
6 V
GND
tPLH
tPHL
Output
Control
Output
Waveform 1
S1 at 6 V
(see Note B)
Output
Waveform 2
S1 at GND
(see Note B)
VOL
VOH
tPZL
tPZH
tPLZ
tPHZ
3 V
0 V
VOH
VOL
0 V
VOL + 0.3 V
VOH − 0.3 V
≈0 V
3 V
0 V
tw
Input
3 V
3 V
VOLTAGE WAVEFORMS
SETUP AND HOLD TIMES
(VM = 1.5 V for A port and 1 V for B port)
(VOH = 3 V for A port and 1.5 V for B port)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(A port to B port)
VOLTAGE WAVEFORMS
PULSE DURATION
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
(A port)
Output
Input
1.5 V
Test
Point
CL = 30 pF
(see Note A)
From Output
Under Test
12.5
LOAD CIRCUIT FOR B OUTPUTS
0 V
VOH
VOL
Input
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
(B port to A port)
Output
1.5 V
NOTES: A. CL includes probe and jig capacitance.
B. Waveform 1 is for an output with internal conditions such that the output is low, except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is high, except when disabled by the output control.
C. All input pulses are supplied by generators having the following characteristics: PRR
≈ 10 MHz, ZO = 50 Ω, tr ≈ 2 ns, tf ≈ 2 ns.
D. The outputs are measured one at a time, with one transition per measurement.
6 V
tPLH
tPHL
VOH
0 V
VM
VM
Data
Input
3 V
0 V
tsu
th
Timing
Input
1.5 V
1.5 V
1.5 V
1.5 V
1 V
1 V
1 V
1 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
1.5 V
SN74GTLPH1612
18-BIT LVTTL-TO-GTLP ADJUSTABLE-EDGE-RATE
UNIVERSAL BUS TRANSCEIVER
SCES287D – OCTOBER 1999 – REVISED MAY 2005
Figure 1. Load Circuits and Voltage Waveforms
10


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