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ADM2485BRWZ Scheda tecnica(PDF) 7 Page - Analog Devices |
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ADM2485BRWZ Scheda tecnica(HTML) 7 Page - Analog Devices |
7 / 15 page Preliminary Technical Data ADM2485 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS D1 1 ADM2485 2 3 4 5 16 15 14 13 12 TOP V IEW ( Not t o Scale) 6 7 8 11 10 9 VDD2 D2 GND2 GND1 GND2 VDD1 B RxD A RE GND2 RTS DE OUT TxD GND2 Figure 2. Pin Configuration Table 4. Pin Mnemonic Function 1 D1 Transformer driver terminal 1. 2 D2 Transformer driver terminal 2. 3 GND1 Ground, Logic Side. 4 VDD1 Power Supply Logic Side, 3V or 5V. Decoupling capacitor to GND1 required, capacitor value should be between 0.01 µF and 0.1 µF. 5 RxD Receiver Output data. This output is high when (A – B) > 200 mV, and low when (A – B) < -200 mV. The output is tri-stated when the receiver is disabled, i.e. when RE is driven high. 6 RE Receiver Enable input. This is an active-low input. Driving this input low enables the receiver, while driving it high disables the receiver. 7 RTS Driver enable input. Driving this input high enables the driver, while driving it low disables the driver. 8 TxD Driver input. Data to be transmitted by the driver is applied to this input. 10 DE OUT Driver Enable status output 12 A Noninverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered down, pin A is put in a high impedance state to avoid overloading the bus. 13 B Inverting Driver Output/Receiver Input. When the driver is disabled or VDD1 or VDD2 is powered down, pin B is put in a high impedance state to avoid overloading the bus. 9,11,14,15 GND2 Ground, Bus Side. 16 VDD2 Power Supply Bus Side, Isolated 5V supply. Decoupling capacitor to GND2 required, capacitor value should be between 0.01 µF and 0.1 µF. Rev. PrK | Page 7 of 15 |
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