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74AUP1G0832 Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74AUP1G0832 Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 19 page 74AUP1G0832_1 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Preliminary data sheet Rev. 01.00 — 26 January 2006 2 of 19 Philips Semiconductors 74AUP1G0832 Low-power 3-input AND-OR gate 3. Quick reference data [1] CPD is used to determine the dynamic power dissipation (PD in µW). PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; Σ(C L × VCC 2 × f o) = sum of the outputs. [2] The condition is VI = GND to VCC. 4. Ordering information Table 1: Quick reference data GND = 0 V; Tamb =25 °C; tr =tf ≤ 3ns. Symbol Parameter Conditions Min Typ Max Unit tPHL, tPLH HIGH-to-LOW and LOW-to-HIGH propagation delay A, BorCtoY CL = 5 pF; RL =1MΩ; VCC = 0.8 V - 19.5 - ns CL = 5 pF; RL =1MΩ; VCC = 1.1 V to 1.3 V 2.5 5.6 11.1 ns CL = 5 pF; RL =1MΩ; VCC = 1.4 V to 1.6 V 1.9 3.9 6.4 ns CL = 5 pF; RL =1MΩ; VCC = 1.65 V to 1.95 V 1.6 3.1 5.1 ns CL = 5 pF; RL =1MΩ; VCC = 2.3 V to 2.7 V 1.4 2.4 3.7 ns CL = 5 pF; RL =1MΩ; VCC = 3.0 V to 3.6 V 1.3 2.2 3.2 ns CI input capacitance - 1.0 - pF CPD power dissipation capacitance VCC = 1.8 V; f = 1 MHz [1] [2] - 3.3 - pF VCC = 3.3 V; f = 1 MHz [1] [2] - 4.2 - pF Table 2: Ordering information Type number Package Temperature range Name Description Version 74AUP1G0832GW −40 °C to +125 °C SC-88 plastic surface mounted package; 6 leads SOT363 74AUP1G0832GM −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1.45 × 0.5 mm SOT886 74AUP1G0832GF −40 °C to +125 °C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 × 1 × 0.5 mm SOT891 |
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