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TC5117400BST-60 Scheda tecnica(PDF) 8 Page - Toshiba Semiconductor |
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TC5117400BST-60 Scheda tecnica(HTML) 8 Page - Toshiba Semiconductor |
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8 / 21 page  TC5117400BSJ/BST-60/70 Standard DRAM DR16040794 8 TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC . PRELIMINARY Notes: 1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. 2. All voltages are referenced to VSS. 3. ICC1, ICC3, ICC4, ICC6 depend on cycle rate. 4. ICC1, ICC4 depend on output loading. Specified values are obtained with the output open. 5. Address can be changed one or less while RAS=VIL. In case of ICC4, it can be changed once or less during a fast page mode cycle (tPC). 6. An initial pause of 200 µs is required after power-up followed by 8 RAS only refresh cycles before proper device operation is achieved. In case of using internal refresh counter, a minimum of 8 CAS before RAS refresh cycles instead of 8 RAS only refresh cycles are required. 7. AC measurements assume tT=5ns. 8. VIH (min.) and VIL (max.) are reference levels for measuring timing of input signals. Also, transition times are measured between VIH and VIL. 9. Measured with a load equivalent to 2 TTL loads and 100pF. 10. tOFF (max.) defines the time at which the output achieves the open circuit condition and is not referenced to output voltage levels. 11. Either tRCH or tRRH must be satisfied for a read cycle. 12. These parameters are referenced to CAS leading edge in early write cycles and to WE leading edge in Read-Modify-Write cycles. 13. tWCS, tRWD, tCWD, tAWD and tCPWD are not restrictive operating parameters. They are included in the data sheet as electrical characteristics only. If tWCS ≥t WCS (min.), the cycle is an early write cycle and the data out pin will remain open circuit (high impedance) through the entire cycle; If tRWD≥tRWD (min.), tCWD≥tCWD (min.), tAWD≥tAWD (min.) and tCPWD≥tCPWD (min.), (Fast Page Mode), the cycle is a Read-Modify-Write cycle and the data out will contain data read from the selected cell: If neither of the above sets of conditions are satisfied, the condition of the data out (at access time) is indeterminate. 14. Operation within the tRCD (max.) limit insures that tRAC can be met. tRCD (max.) is specified as a reference point only: If tRCD is greater than the specified tRCD (max.) limit, then access time is controlled by tCAC. 15. Operation within the tRAD (max.) limit insures that tRAC (max.) can be met. tRAD (max.) is specified as a reference point only: If tRAD is greater than the specified tRAD (max.) limit, then access time is controlled by tAA. |
Codice articolo simile - TC5117400BST-60 |
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Descrizione simile - TC5117400BST-60 |
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