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AD8202YR-REEL7 Scheda tecnica(PDF) 10 Page - Analog Devices

Il numero della parte AD8202YR-REEL7
Spiegazioni elettronici  High Common-Mode Voltage, Single-Supply Difference Amplifier
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD8202YR-REEL7 Scheda tecnica(HTML) 10 Page - Analog Devices

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AD8202
Rev. A | Page 10 of 12
GAIN TRIM
Figure 18 shows a method for incremental gain trimming by
using a trim potentiometer and external resistor REXT.
The following approximation is useful for small gain ranges.
ΔG ≈ (10 MΩ ÷ REXT)%
Thus, the adjustment range is ±2% for REXT = 5 MΩ; ±10% for
REXT = 1 MΩ, and so on.
5V
OUT
REXT
GAIN TRIM
20k
Ω MIN
VCM
VDIFF
2
VDIFF
2
NC = NO CONNECT
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8202
Figure 18. Incremental Gain Trim
Internal Signal Overload Considerations
When configuring gain for values other than 20, the maximum
input voltage with respect to the supply voltage and ground
must be considered, since either the preamplifier or the output
buffer reaches its full-scale output (approximately VS – 0.2 V)
with large differential input voltages. The input of the AD8202
is limited to (VS – 0.2) ÷ 10 for overall gains ≤ 10, since the pre-
amplifier, with its fixed gain of ×10, reaches its full-scale output
before the output buffer. For gains greater than 10, the swing at
the buffer output reaches its full scale first and limits the
AD8202 input to (VS – 0.2) ÷ G, where G is the overall gain.
LOW-PASS FILTERING
In many transducer applications, it is necessary to filter the sig-
nal to remove spurious high frequency components including
noise, or to extract the mean value of a fluctuating signal with a
peak-to-average ratio (PAR) greater than unity. For example, a
full-wave rectified sinusoid has a PAR of 1.57, a raised cosine
has a PAR of 2, and a half-wave sinusoid has a PAR of 3.14.
Signals having large spikes may have PARs of 10 or more.
When implementing a filter, the PAR should be considered so
that the output of the AD8202 preamplifier (A1) does not clip
before A2, since this nonlinearity would be averaged and appear
as an error at the output. To avoid this error, both amplifiers
should be made to clip at the same time. This condition is
achieved when the PAR is no greater than the gain of the sec-
ond amplifier (2 for the default configuration). For example, if a
PAR of 5 is expected, the gain of A2 should be increased to 5.
Low-pass filters can be implemented in several ways by using
the features provided by the AD8202. In the simplest case, a
single-pole filter (20 dB/decade) is formed when the output of
A1 is connected to the input of A2 via the internal 100 kΩ resis-
tor by strapping Pins 3 and 4 and a capacitor added from this
node to ground, as shown in Figure 19. If a resistor is added
across the capacitor to lower the gain, the corner frequency
increases; it should be calculated using the parallel sum of the
resistor and 100 kΩ.
5V
VCM
VDIFF
2
VDIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8202
OUTPUT
FC =
1
2
πC105
C IN FARADS
Figure 19. Single-Pole, Low-Pass Filter Using the Internal 100 kΩ Signal
If the gain is raised using a resistor, as shown in Figure 17, the
corner frequency is lowered by the same factor as the gain is
raised. Thus, using a resistor of 200 kΩ (for which the gain
would be doubled), the corner frequency is now 0.796 Hz µF
(0.039 µF for a 20 Hz corner frequency.)
5V
VCM
VDIFF
2
VDIFF
2
NC = NO CONNECT
C
GND
NC
–IN
+IN
A1
+VS
A2
OUT
AD8202
OUT
C
255k
FC = 1Hz –
µF
Figure 20. 2-Pole, Low-Pass Filter
A 2-pole filter (with a roll-off of 40 dB/decade) can be imple-
mented using the connections shown in Figure 20. This is a
Sallen-Key form based on a ×2 amplifier. It is useful to remember
that a 2-pole filter with a corner frequency f2 and a 1-pole filter
with a corner at f1 have the same attenuation at the frequency
(f22/f1). The attenuation at that frequency is 40 log (f2/f1), which is
illustrated in Figure 21. Using the standard resistor value shown
and equal capacitors (Figure 20), the corner frequency is conven-
iently scaled at 1 Hz µF (0.05 µF for a 20 Hz corner). A maximally
flat response occurs when the resistor is lowered to 196 kΩ and
the scaling is then 1.145 Hz µF. The output offset is raised by
approximately 5 mV (equivalent to 250 µV at the input pins).


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