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AD12401-326KWS Scheda tecnica(PDF) 7 Page - Analog Devices

Il numero della parte AD12401-326KWS
Spiegazioni elettronici  12-Bit, 400 MSPS A/D Converter
Download  28 Pages
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD12401-326KWS Scheda tecnica(HTML) 7 Page - Analog Devices

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AD12401
Rev. A | Page 7 of 28
AD12401-326KWS
AD12401-326JWS
Parameter
Case Temp
Test Level
Min
Typ
Max
Min
Typ
Max
Unit
ANALOG INPUT
Frequency Range
Full
IV
10
140
10
140
MHz
DIGITAL INPUT (DR_EN)
Minimum Time (Low)
Full
IV
6.2
6.2
ns
SWITCHING SPECIFICATIONS
Conversion Rate6
Full
IV
323
326
329
323
326
329
MSPS
Encode Pulse Width High (tEH)1
60°C
V
1.53
1.53
ns
Encode Pulse Width Low (tEL)1
60°C
V
1.53
1.53
ns
DIGITAL OUTPUT PARAMETERS
Valid Time (tV)
Full
IV
5.0
5.0
ns
Propagation Delay (tPD)
60°C
V
8.7
8.7
ns
Rise Time, tR (20% to 80%)
60°C
V
0.3
0.3
ns
Fall Time, tF (20% to 80%)
60°C
V
0.3
0.3
ns
DR Propagation Delay (tEDR)
60°C
V
11.8
11.8
ns
Data to DR Skew (tEDR − tPD)
60°C
V
3.1
3.1
ns
Pipeline Latency7
Full
IV
74
74
Cycles
Start-Up Time
Full
IV
29
44
87
29
44
87
ms
Postprocessing Configuration Time
Full
IV
3.4
3.4
sec
APERTURE DELAY (tA)
60°C
V
2.3
2.3
ns
APERTURE UNCERTAINTY (Jitter, tJ)
60°C
V
0.4
0.4
ps rms
1 All ac specifications tested with a single-ended, 2.0 V p-p encode on ENCODE and ENCODE floating.
2 The image spur is included in the SINAD measurement.
3 The image spur is not included in the SFDR specification.
4 The image spur is at fS/2 − AIN; the offset spur is at fS/2.
5 F1 = 70 MHz, F2 = 73 MHz.
6 Parts are tested with 326 MSPS encode. Device can be clocked at lower encode rates, but specifications are not guaranteed. Specifications are guaranteed by design
for encode 326 MSPS ±1%.
7 Pipeline latency is exactly 74 cycles with an additional tPD required for data to emerge.


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