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MC145483SD Scheda tecnica(PDF) 6 Page - Motorola, Inc |
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MC145483SD Scheda tecnica(HTML) 6 Page - Motorola, Inc |
6 / 19 page MC145483 MOTOROLA 6 DIGITAL I/O The MC145483 is a 13–bit linear device using 2s comple- ment data format. Table 2 shows the 13–bit data word format for the maximum positive code and negative zero and full– scale. Table 3 shows the series of eight 13–bit PCM words that correspond to a digital milliwatt. The digital milliwatt is the 1 kHz calibration signal reconstructed by the DAC that de- fines the absolute gain or 0 dBm0 transmission level point (TLP) of the DAC. The calibration level for this 13–bit linear ADC and DAC is referenced to Mu–Law with the same bit voltage weighting about the zero crossing. This results in the 0 dBm0 calibration level being 3.20 dB below the peak sinu- soidal level before clipping. Refer to Figures 2a–2d for a summary and comparison of the four PCM data interface modes of this device. Table 2. PCM Codes for Zero and Full–Scale Level Sign Bit Magnitude Bits + Full Scale 0 1111 1111 1111 + One Step 0 0000 0000 0001 Zero 0 0000 0000 0000 – One Step 1 1111 1111 1111 – Full Scale 1 0000 0000 0000 Table 3. PCM Codes for 1 kHz Digital Milliwatt Level Sign Bit Magnitude Bits π/8 3 π/8 5 π/8 7 π/8 9 π/8 11 π/8 13 π/8 15 π/8 |
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