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74LVT162373 Scheda tecnica(PDF) 4 Page - NXP Semiconductors |
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74LVT162373 Scheda tecnica(HTML) 4 Page - NXP Semiconductors |
4 / 12 page Philips Semiconductors Product specification 74LVT162373 3.3 V LVT 16-bit transparent D-type latch with 30 Ω termination resistors (3-State) 1999 Sep 23 4 LOGIC DIAGRAM E Q D nD0 nQ0 EQ D nD1 EQ D nD2 EQ D nD3 EQ D nD4 EQ D nD5 EQ D nD6 EQ D nD7 nQ1 nQ2 nQ3 nQ4 nQ5 nQ6 nQ7 nLE nOE SA00046 FUNCTION TABLE INPUTS INTERNAL OUTPUTS OPERATING MODE nOE nLE nDx REGISTER nQ0 – nQ7 OPERATING MODE L L H H L H L H L H Enable and read register L L ↓ ↓ l h L H L H Latch and read register L L X NC NC Hold H H L H X nDx NC nDx Z Z Disable outputs H = High voltage level h = High voltage level one set-up time prior to the High-to-Low E transition L = Low voltage level l = Low voltage level one set-up time prior to the High-to-Low E transition NC= No change X = Don’t care Z = High impedance “off ” state ↓ = High-to-Low LE transition SCHEMATIC OF EACH OUTPUT OUTPUT 27 Ω 27 Ω VCC SW00503 |
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