ADF4252 datasheet(3/28 Pages) AD

Il numero della parte	ADF4252

Spiegazioni elettronici	Dual Fractional-N/Integer-N Frequency Synthesizer

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REV. B

ADF4252

–3–

TIMING CHARACTERISTICS*

Limit at

TMIN to TMAX

Parameter

(B Version)

Unit

Test Conditions/Comments

t1

10

ns min

LE Setup Time

t2

10

ns min

DATA to CLOCK Setup Time

t3

10

ns min

DATA to CLOCK Hold Time

t4

25

ns min

CLOCK High Duration

t5

25

ns min

CLOCK Low Duration

t6

10

ns min

CLOCK to LE Setup Time

t7

20

ns min

LE Pulse Width

*Guaranteed by design, but not production tested.

(VDD1 = VDD2 = VDD3 = DVDD = 3 V

10%, DVDD < VP1, VP2 < 5.5 V, GND = 0 V,

unless otherwise noted.)

CLOCK

DATA

LE

t4

t2

t3

t5

t7

t6

DB22

DB2

DB1

(CONTROL BIT C2)

DB0 (LSB)

(CONTROL BIT C1)

DB23 (MSB)

t1

Figure 1. Timing Diagram

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