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74LVC169D Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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74LVC169D Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
3 / 14 page Philips Semiconductors Product specification 74LVC169 Presettable synchronous 4-bit up/down binary counter 1998 May 20 3 PIN CONFIGURATION 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 VCC TC Q0 Q1 Q2 Q3 CET PE U/D CP D0 D1 D2 D3 CEP GND SF00766 LOGIC SYMBOL 9 3456 15 11 12 13 14 1 2 7 10 CP CEP CET PE D0 D1 D2 D3 Q0 Q1 Q2 Q3 TC U/D SF00786 VCC = Pin 16 GND = Pin 8 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 1 U/D up/down control input 2 CP clock input (LOW-to-HIGH, edge-triggered) 3,4,5,6 D0 to D3 data inputs 7 CEP count enable inputs (active LOW) 8 GND ground (0V) 9 PE parallel enable input (active LOW) 10 CET count enable carry input (active LOW) 14,13,12,11 Q0 to Q3 flip-flop outputs 15 TC terminal count output (active LOW) 16 VCC positive supply voltage LOGIC SYMBOL (IEEE/IEC) M4 [DOWN] 9 1 10 7 2 [1] 3 4 5 6 1, 7D 14 13 12 11 M1 [LOAD] SF00787 M2 [COUNT] M3 [UP] CTR DIV 16 [2] [4] [8] 15 3, 5 CT=15 4, 5 CT=0 G5 G6 2, 3, 5, 6+/C7 2, 4, 5, 6– |
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