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74LV161N Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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74LV161N Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
10 / 16 page Philips Semiconductors Product specification 74LV161 Presettable synchronous 4-bit binary counter; asynchronous reset 1997 May 15 10 SV00580 VM CEP, CET INPUT CP INPUT VM th tsu tsu th GND GND VI VI The shaded areas indicate when the input is permitted to change for predictable output performance. Figure 5. CEP and CET set-up and hold times. TEST CIRCUIT SWITCH POSITION PULSE GENERATOR RT VI D.U.T. VO CL RL VCC RL Test Circuit for switching times Open GND S1 DEFINITIONS VCC VI < 2.7V VCC TEST S1 tPLH/tPHL Open RL = Load resistor; see AC CHARACTERISTICS for value. CL = Load capacitance includes jig and probe capacitance: See AC CHARACTERISTICS for value. RT = Termination resistance should be equal to ZOUT of pulse generators. 2 x VCC 2 x VCC tPLZ/tPZL 2.7V 2.7–3.6V tPHZ/tPZH GND SV00776 Figure 6. Load circuitry for switching times. |
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