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74HCT4053PW Scheda tecnica(PDF) 5 Page - NXP Semiconductors |
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74HCT4053PW Scheda tecnica(HTML) 5 Page - NXP Semiconductors |
5 / 33 page 74HC_HCT4053_4 © Koninklijke Philips Electronics N.V. 2006. All rights reserved. Product data sheet Rev. 04 — 9 May 2006 5 of 33 Philips Semiconductors 74HC4053; 74HCT4053 Triple 2-channel analog multiplexer/demultiplexer 7. Pinning information 7.1 Pinning Fig 4. Schematic diagram (one switch) 001aad544 from logic VCC VEE VEE VCC VCC VEE Y Z VCC (1) The die substrate is attached to this pad using conductive die attach material. It can not be used as supply pin or input. Fig 5. Pin configuration DIP16, SO16 and (T)SSOP16 Fig 6. Pin configuration DHVQFN16 74HC4053 74HCT4053 2Y1 VCC 2Y0 2Z 3Y1 1Z 3Z 1Y1 3Y0 1Y0 ES1 VEE S2 GND S3 001aae127 1 2 3 4 5 6 7 8 10 9 12 11 14 13 16 15 001aae128 VEE S2 ES1 3Y0 1Y0 3Z 1Y1 3Y1 1Z 2Y0 2Z Transparent top view 7 10 6 11 5 12 4 13 3 14 2 15 terminal 1 index area GND(1) 74HC4053 74HCT4053 |
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