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74HCT597N Scheda tecnica(PDF) 10 Page - NXP Semiconductors |
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74HCT597N Scheda tecnica(HTML) 10 Page - NXP Semiconductors |
10 / 12 page December 1990 10 Philips Semiconductors Product specification 8-bit shift register with input flip-flops 74HC/HCT597 AC WAVEFORMS FOR 74HCT GND = 0 V; tr =tf = 6 ns; CL =50pF SYMBOL PARAMETER Tamb (°C) UNIT TEST CONDITIONS 74HCT VCC (V) WAVEFORMS +25 −40 to +85 −40 to +125 min. typ. max. min. max. min. max. tPHL/ tPLH propagation delay SHCP to Q 23 40 50 60 ns 4.5 Fig.7 tPHL propagation delay MR to Q 28 49 61 74 ns 4.5 Fig.8 tPHL/ tPLH propagation delay STCP to Q 33 57 71 86 ns 4.5 Fig.7 tPHL/ tPLH propagation delay PL to Q 30 52 65 78 ns 4.5 Fig.9 tTHL/ tTLH output transition time 7 15 19 22 ns 4.5 Fig.9 tW SHCP pulse width HIGH or LOW 16 7 20 24 ns 4.5 Fig.7 tW STCP pulse width HIGH or LOW 16 6 20 24 ns 4.5 Fig.7 tW MR pulse width LOW 25 14 31 38 ns 4.5 Fig.8 tW PL pulse width LOW 20 10 25 30 ns 4.5 Fig.9 trem removal time MR to SHCP 12 −2 15 18 ns 4.5 Fig.10 tsu set-up time Dn to STCP 12 5 15 18 ns 4.5 Fig.11 tsu set-up time DS to SHCP 12 2 15 18 ns 4.5 Fig.11 tsu set-up time PL to SHCP 12 4 15 18 ns 4.5 Fig.12 th hold time Dn to STCP 5 −1 5 5 ns 4.5 Fig.11 th hold time PL, DS to SHCP 5 −2 5 5 ns 4.5 Fig.11 fmax maximum pulse frequency SHCP 30 75 24 20 MHz 4.5 Fig.7 |
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