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74HCT259D Scheda tecnica(PDF) 11 Page - NXP Semiconductors

Il numero della parte 74HCT259D
Spiegazioni elettronici  8-bit addressable latch
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74HCT259D Scheda tecnica(HTML) 11 Page - NXP Semiconductors

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December 1990
11
Philips Semiconductors
Product specification
8-bit addressable latch
74HC/HCT259
PACKAGE OUTLINES
See
“74HC/HCT/HCU/HCMOS Logic Package Outlines”.
Fig.9 Waveforms showing the conditional reset input (MR) to output (Qn) propagation delays.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.10 Waveforms showing the data set-up and hold times for the D input to LE input.
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.
Fig.11 Waveforms showing the address set-up and hold times for An inputs to LE input.
The shaded areas indicate when the input is
permitted to change for predictable output
performance.
(1) HC : VM = 50%; VI = GND to VCC.
HCT: VM = 1.3 V; VI = GND to 3 V.


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