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74AHC595PW Scheda tecnica(PDF) 3 Page - NXP Semiconductors |
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74AHC595PW Scheda tecnica(HTML) 3 Page - NXP Semiconductors |
3 / 20 page 2000 Mar 15 3 Philips Semiconductors Product specification 8-bit serial-in/serial or parallel-out shift register with output latches; 3-state 74AHC595; 74AHCT595 FUNCTION TABLE See note 1. Note 1. H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH transition; ↓ = HIGH-to-LOW transition; X = don’t care; NC = no change; Z = high impedance OFF-state. ORDERING INFORMATION INPUT OUTPUT FUNCTION SHCP STCP OE MR DS Q7’Qn X X L L X L NC a LOW level on MR only affects the shift registers X ↑ L L X L L empty shift register loaded into storage register X X H L X L Z shift register clear. Parallel outputs in high impedance OFF-state. ↑ XL H H Q6’ NC logic HIGH level shifted into shift register stage 0. Contents of all shift register stages shifted through, e.g. previous state of stage 6 (internal Q6’) appears on the serial output (Q7’). X ↑ LH X NC Qn’ contents of shift register stages (internal Qn’) are transferred to the storage register and parallel output stages ↑↑ LH X Q6’Qn’ contents of shift register shifted through. Previous contents of the shift register is transferred to the storage register and the parallel output stages. TYPE NUMBER PACKAGES TEMPERATURE RANGE PINS PACKAGE MATERIAL CODE 74AHC595D −40 to +125 °C 16 SO plastic SOT109-1 74AHC595PW 16 TSSOP plastic SOT403-1 74AHCT595D 16 SO plastic SOT109-1 74AHCT595PW 16 TSSOP plastic SOT403-1 |
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