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74AHC1G32 Scheda tecnica(PDF) 8 Page - NXP Semiconductors |
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74AHC1G32 Scheda tecnica(HTML) 8 Page - NXP Semiconductors |
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8 / 12 page  1999 Jan 27 8 Philips Semiconductors Product specification 2-input OR gate 74AHC1G32; 74AHCT1G32 AC WAVEFORMS Fig.5 The input (inA, inB) to output (outY) propagation delays. FAMILY VI INPUT REQUIREMENTS VM INPUT VM OUTPUT AHC1G GND to VCC 50% VCC 50% VCC AHCT1G GND to 3.0 V 1.5 V 50% VCC handbook, halfpage MNA167 inA, inB INPUT outY OUTPUT tPHL tPLH VM (1) VM (1) Fig.6 Load circuitry for switching times. handbook, halfpage VCC VI VO MNA101 D.U.T. CL RT PULSE GENERATOR Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. (See Chapter “AC characteristics” for values). RT = Termination resistance should be equal to the output impedance Zo of the pulse generator. |
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