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54ACT534SMQR Scheda tecnica(PDF) 2 Page - National Semiconductor (TI) |
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54ACT534SMQR Scheda tecnica(HTML) 2 Page - National Semiconductor (TI) |
2 / 8 page Functional Description The ’ACT534 consists of eight edge-triggered flip-flops with individual D-type inputs and TRI-STATE complementary outputs The buffered clock and buffered Output Enable are common to all flip-flops The eight flip-flops will store the state of their individual D inputs that meet the setup and hold times requirements on the LOW-to-HIGH Clock (CP) transition With the Output Enable (OE) LOW the contents of the eight flip-flops are available at the outputs When the OE is HIGH the outputs go to the high impedance state Operation of the OE input does not affect the state of the flip-flops Logic Diagram TLF9965 – 5 Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays Function Table Inputs Output CP OE D O L LH L L LL H LL X O0 XH X Z H e HIGH Voltage Level L e LOW Voltage Level X e Immaterial L e LOW-to-HIGH Clock Transition Z e High Impedance O0 e Value stored from previous clock cycle 2 |
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