74LVX373 datasheet(1/8 Pages) NSC

Il numero della parte	74LVX373

Spiegazioni elettronici	Low Voltage Octal Transparent Latch with TRI-STATE Outputs

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Produttore elettronici	NSC [National Semiconductor (TI)]

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TLF11613

January 1996

74LVX373

Low Voltage Octal Transparent Latch

with TRI-STATE

Outputs

General Description

The LVX373 consists of eight latches with TRI-STATE out-

puts for bus organized system applications The latches ap-

pear transparent to the data when Latch Enable (LE) is

HIGH When LE is low the data satisfying the input timing

requirements is latched Data appears on the bus when the

Output Enable (OE) is LOW When OE is HIGH the bus

output is in the high impedance state The inputs tolerate up

to 7V allowing interface of 5V systems to 3V systems

Features

Y

Input voltage translation from 5V to 3V

Y

Ideal for low powerlow noise 33V applications

Y

Available in SOIC JEDEC

SOIC EIAJ and TSSOP

packages

Y

Guaranteed simultaneous switching noise level and

dynamic threshold performance

Logic Symbols

Connection Diagram

TLF11613 – 1

IEEEIEC

TLF11613 – 4

Pin Assignment for

SOIC and TSSOP

TLF11613 – 2

Pin Names

Description

D0–D7

Data Inputs

LE

Latch Enable Input

OE

Output Enable Input

O0–O7

TRI-STATE Latch Outputs

SOIC JEDEC

SOIC EIAJ

TSSOP

Order Number

74LVX373M

74LVX373SJ

74LVX373MTC

74LVX373MX

74LVX373SJX

74LVX373MTCX

See NS Package Number

M20B

M20D

MTC20

TRI-STATE

is a registered trademark of National Semiconductor Corporation

C1996 National Semiconductor Corporation

RRD-B30M17Printed in U S A

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www nationalcom

Codice articolo simile - 74LVX373

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ON Semiconductor	74LVX373	101Kb / 8P	Octal D-Type Latch with 3-State Outputs With 5V?뭈olerant Inputs March, 2005 ??Rev. 2
Fairchild Semiconductor	74LVX373	80Kb / 7P	Low Voltage Octal Transparent Latch with 3-STATE Outputs
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ON Semiconductor	74LVX373	198Kb / 9P	Low Voltage Octal Transparent Latch with 3-STATE Outputs Revised April 2005

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