Motore di ricerca datesheet componenti elettronici |
|
GS8182S18GD-250I Scheda tecnica(PDF) 5 Page - GSI Technology |
|
GS8182S18GD-250I Scheda tecnica(HTML) 5 Page - GSI Technology |
5 / 31 page GS8182S18D-267/250/200/167 Specifications cited are subject to change without notice. For latest documentation see http://www.gsitechnology.com. Rev: 1.08a 8/2005 5/31 © 2003, GSI Technology Burst of 2 SigmaSIO-II SRAM DDR Write The status of the Address Input, R/W, and LD pins are sampled at each rising edge of K. LD high causes chip disable. A low on the R/W pin, begins a write cycle. Data is clocked in by the next rising edge of K and then the rising edge of K. SigmaSIO-II Double Data Rate SRAM Write First Write A Read B NOP Read C Write D NOP Read E Read F NOP A B C D E F A A+1 D D+1 A A+1 D D+1 B B+1 C C+1 E E+1 F K K Address LD R/W BWx D C C Q CQ CQ |
Codice articolo simile - GS8182S18GD-250I |
|
Descrizione simile - GS8182S18GD-250I |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |