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74ABT16374B Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74ABT16374B Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 10 page Philips Semiconductors Product specification 74ABT16374B 74ABTH16374B 16-bit D-type flip-flop; positive-edge trigger (3-State) 2 1998 Feb 27 853-1752 19027 FEATURES • Two 8-bit positive edge triggered registers • Live insertion/extraction permitted • Power-up 3-State • Power-up reset • Multiple V CC and GND pins minimize switching noise • 3-State output buffers • 74ABTH16373B incorporates bus-hold data inputs which eliminate the need for external pull-up resistors to hold unused inputs • Bus-hold data inputs eliminate the need for external pull-up resistors to hold unused inputs • Output capability: +64mA/–32mA • Latch-up protection exceeds 500mA per JEDEC Std 17 • ESD protection exceeds 2000V per MIL STD 883 Method 3015 and 200V per Machine Model DESCRIPTION The 74ABT16374B high-performance BiCMOS device combines low static and dynamic power dissipation with high speed and high output drive. The 74ABT16374B has two 8-bit, edge triggered registers, with each register coupled to eight 3-State output buffers. The two sections of each register are controlled independently by the clock (nCP) and Output Enable (nOE) control gates. Each register is fully edge triggered. The state of each D input, one set-up time before the Low-to-High clock transition, is transferred to the corresponding flip-flop’s Q output. The 3-State output buffers are designed to drive heavily loaded 3-State buses, MOS memories, or MOS microprocessors. Each active-Low Output Enable (nOE) controls all eight 3-State buffers for its register independent of the clock operation. When nOE is Low, the stored data appears at the outputs for that register. When nOE is High, the outputs for that register are in the High-impedance “OFF” state, which means they will neither drive nor load the bus. Two options are available, 74ABT16374B which does not have the bus-hold feature and 74ABTH16374B which incorporates the bus-hold feature. QUICK REFERENCE DATA SYMBOL PARAMETER CONDITIONS Tamb = 25°C; GND = 0V TYPICAL UNIT tPLH tPHL Propagation delay nCP to nQx CL = 50pF; VCC = 5V 2.6 2.2 ns CIN Input capacitance VI = 0V or VCC 4 pF COUT Output capacitance VO = 0V or VCC; 3-State 7 pF ICCZ Quiescent supply current Outputs disabled; VCC = 5.5V 500 µA ICCL Quiescent su ly current Outputs Low; VCC = 5.5V 8 mA ORDERING INFORMATION PACKAGES TEMPERATURE RANGE OUTSIDE NORTH AMERICA NORTH AMERICA DWG NUMBER 48-Pin Plastic SSOP Type III –40 °C to +85°C 74ABT16374B DL BT16374B DL SOT370-1 48-Pin Plastic TSSOP Type II –40 °C to +85°C 74ABT16374B DGG BT16374B DGG SOT362-1 48-Pin Plastic SSOP Type III –40 °C to +85°C 74ABTH16374B DL BH16374B DL SOT370-1 48-Pin Plastic TSSOP Type II –40 °C to +85°C 74ABTH16374B DGG BH16374B DGG SOT362-1 PIN DESCRIPTION PIN NUMBER SYMBOL FUNCTION 47, 46, 44, 43, 41, 40, 38, 37 36, 35, 33, 32, 30, 29, 27, 26 1D0 – 1D7 2D0 – 2D7 Data inputs 2, 3, 5, 6, 8, 9, 11, 12 13, 14, 16, 17, 19, 20, 22, 23 1Q0 – 1Q7 2Q0 – 2Q7 Data outputs 1, 24 1OE, 2OE Output enable inputs (active-Low) 48, 25 1CP, 2CP Clock pulse inputs (active rising edge) 4, 10, 15, 21, 28, 34, 39, 45 GND Ground (0V) 7, 18, 31, 42 VCC Positive supply voltage LOGIC SYMBOL 3 2 1Q0 1Q1 1Q2 6 5 1Q3 47 46 44 43 1D0 1D1 1D2 1D3 48 1 9 8 1Q4 1Q5 1Q6 12 11 1Q7 41 40 38 37 1D4 1D5 1D6 1D7 1CP 1OE 14 13 17 16 36 35 33 32 25 24 20 19 23 22 30 29 27 26 2Q0 2Q1 2Q2 2Q3 2D0 2D21 2D2 2D3 2Q4 2Q5 2Q6 2Q7 2D4 2D5 2D6 2D7 2CP 2OE SH00078 |
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