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ES35P40-75CG2T Scheda tecnica(PDF) 5 Page - Excel Semiconductor Inc. |
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ES35P40-75CG2T Scheda tecnica(HTML) 5 Page - Excel Semiconductor Inc. |
5 / 35 page ES I ES I 5 Rev. 0D May 11 , 2006 ES25P40 Excel Semiconductor inc. ADVANCED INFORMATION Figure 1. Bus Master and Memory Devices on the SPI Bus SCK SPI Interface with (CPOL, CPHA) = (0,0) or (1,1) Bus Master CS1 CS2 CS3 SPI Memory Device SPI Memory Device SPI Memory Device SO SI SCK SO SI SCK SO SI SCK SO SI CS# CS# CS# W# W# W# HOLD# HOLD# HOLD# Note : The Write Protect (W#) and Hold (HOLD#) signals should be driven, High or Low as appropriate Figure 2. SPI Modes Supported SCK CS# SCK SI MSB SO CPOL CPHA 0 0 1 1 MSB |
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