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GS1575A Scheda tecnica(PDF) 6 Page - Gennum Corporation |
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GS1575A Scheda tecnica(HTML) 6 Page - Gennum Corporation |
6 / 29 page GS1575A / GS9075A Data Sheet 34716 - 0 December 2005 6 of 29 1.3 Pin Descriptions Table 1-1: Pin Descriptions Pin Number Name Type Description 1, 3 DDI0, DDI0 Input Serial digital differential input 0. 2 DDI0_VTT Passive Center tap of two 50 Ω on-chip termination resistors between DDI0 and DDI0. 4, 8, 12,16, 32, 37, 43, 49, 64 GND Passive Recommended connect to GND. 5, 7 DDI1,DDI1 Input Serial digital differential input 1. 6 DDI1_VTT Passive Center tap of two 50 Ω on-chip termination resistors between DDI1 and DDI1. 9, 11 DDI2, DDI2 Input Serial digital differential input 2. 10 DDI2_VTT Passive Center tap of two 50 Ω on-chip termination resistors between DDI2 and DDI2. 13, 15 DDI3, DDI3 Input Serial digital differential input 3. 14 DDI3_VTT Passive Center tap of two 50 Ω on-chip termination resistors between DDI3 and DDI3. 17, 18 DDI_SEL[1:0] Logic Input Serial digital input select. 19 BYPASS Logic Input Bypass the reclocker stage. When BYPASS is HIGH, it overwrites the AUTOBYPASS setting. 20 AUTOBYPASS Logic Input Automatically bypasses the reclocker stage when the PLL is not locked This pin is ignored when BYPASS is HIGH. 21 AUTO/MAN Logic Input Auto/Manual select. When set HIGH, the standard is automatically detected from the input data rate. When set LOW, the user must program the input standard using the SS[2:0] pins. 22 VCC_VCO Power Most positive power supply connection for the internal VCO section. Connect to 3.3V. 23 VEE_VCO Power Most negative power supply connection for the internal VCO section. Connect to GND. DDI_SEL1 DDI_SEL0 INPUT SELECTED 0 0 DDI0 0 1 DDI1 1 0 DDI2 1 1 DDI3 |
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