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MC100EL1648DTR Scheda tecnica(PDF) 6 Page - ON Semiconductor |
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MC100EL1648DTR Scheda tecnica(HTML) 6 Page - ON Semiconductor |
6 / 14 page MC100EL1648 http://onsemi.com 6 OPERATION THEORY Figure 5 illustrates the simplified circuit schematic for the MC100EL1648. The oscillator incorporates positive feedback by coupling the base of transistor Q6 to the collector of Q7. An automatic gain control (AGC) is incorporated to limit the current through the emitter−coupled pair of transistors (Q7 and Q6) and allow optimum frequency response of the oscillator. In order to maintain the high quality factor (Q) on the oscillator, and provide high spectral purity at the output, transistor Q4 is used to translate the oscillator signal to the output differential pair Q2 and Q3. Figure 16 indicates the high spectral purity of the oscillator output (pin 4 on 8−pin SOIC). Transistors Q2 and Q3, in conjunction with output transistor Q1, provide a highly buffered output that produces a square wave. The typical output waveform can be seen in Figure 4. The bias drive for the oscillator and output buffer is provided by Q9 and Q11 transistors. In order to minimize current, the output circuit is realized as an emitter−follower buffer with an on chip pull−down resistor RE. Figure 5. Circuit Schematic AGC VEE TANK BIAS VEE VCC VCC Q4 Q3 Q2 Q1 Q5 D1 Q8 Q7 Q6 Q9 Q10 Q11 D2 OUTPUT 800 W 1.36 K W 1.6 K W 3.1 K W 660 W 167 W 400 W 330 W 16 K W 82 W 400 W 660 W 510 W 2 (14) 3 (1) 4 (3) 1 (12) 5 (5) 8 (10) 7 (8) 6 (7) 8 pin (14 pin) Lead Package |
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