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PE3100G2DBIRM Scheda tecnica(PDF) 6 Page - Silicom Ltd.

Il numero della parte PE3100G2DBIRM
Spiegazioni elettronici  Dual Port Fiber 100 Gigabit Intel짰 FM10840 Based
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Produttore elettronici  SILICOM [Silicom Ltd.]
Homepage  https://www.silicom-usa.com/
Logo SILICOM - Silicom Ltd.

PE3100G2DBIRM Scheda tecnica(HTML) 6 Page - Silicom Ltd.

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Silicom Ltd. Connectivity Solutions
Page 6
Figure 2 illustrates example of functional block diagram of content aware TAP:
Packets received in port A and meet rule are directed to ports B nad C (TAP), other packets are directed to port B (Bypass).
Packets received in port B and meet rule are directed to ports F and A (TAP), other packets are directed to port A (Bypass).
Director
– Content Filtering NIC
Silicom’s Ethernet content aware provides intelligent packet redirection capability where rules specify which packets are directed to
the host or dropped.
Figure 3: Content Aware Filtering NIC Functional Block Diagram
Figure 3 illustrates functional block diagram of content aware TAP:
Packets received in port A and meet rule, direct to port C and D. Packets received in port A and do not meet rule are dropped.
Packets received in port B and meet rule, direct to ports E and F. Packets received in port B and do not meet rule are dropped.
Director
– Load balancing (*Future Support)
Silicom’s Ethernet content aware director provides a load balancing of the traffic coming from 2 100G external ports (A, B). The
traffic is balanced, based on a defined hash configuration, to the 4x 50G internal interfaces (C,D,E and F) that are going to the host
Figure 4: Load Balancing Functional Block Diagram
If there is external port that is heavily loaded the traffic will go into the 4 internal interfaces with balanced load. An ISL tag is added
to all incoming packets, it enables the host to know the source port, and the ISL tag is removed from packets that are sent back
from the host.


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