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LMQ61460 Scheda tecnica(PDF) 46 Page - Texas Instruments

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Il numero della parte LMQ61460
Spiegazioni elettronici  LMQ61460 3-V to 36-V, 6 A, Low EMI Synchronous Step-Down Quiet Converter
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
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10 Layout
10.1 Layout Guidelines
The PCB layout of any DC-DC converter is critical to the optimal performance of the design. Bad PCB layout can
disrupt the operation of an otherwise good schematic design. Even if the converter regulates correctly, bad PCB
layout can mean the difference between a robust design and one that cannot be mass produced. Furthermore,
the EMI performance of the converter is dependent on the PCB layout, to a great extent. In a buck converter, the
most critical PCB feature is the loop formed by the input capacitor or capacitors and power ground, as shown in
Figure 10-1. This loop carries large transient currents that can cause large transient voltages when reacting with
the trace inductance. These unwanted transient voltages disrupt the proper operation of the converter. Because
of this, the traces in this loop must be wide and short, and the loop area as small as possible to reduce the
parasitic inductance. Figure 10-2 shows a recommended layout for the critical components for the circuit of the
device.
• Place the input capacitor or capacitors as close as possible input pin pairs: VIN1 to PGND1 and VIN2 to
PGND2. Each pair of pins are adjacent, simplifying the input capacitor placement. With the VQFN-HR
package, there are two VIN/PGND pairs on either side of the package. This provides for a symmetrical layout
and helps minimize switching noise and EMI generation. Use a wide VIN plane on a lower layer to connect
both of the VIN pairs together to the input supply.
• Place bypass capacitor for VCC close to the VCC pin and AGND pins: This capacitor must routed with short,
wide traces to the VCC and AGND pins.
• Use wide traces for the CBOOT capacitor: Place the CBOOT capacitor as close to the device with short, wide
traces to the CBOOT and SW pins. It is important to route the SW connection under the device through the
gap between VIN2 and RBOOT pins, reducing exposed SW node area. If an RBOOT resistor is used, place
as close as possible to CBOOT and RBOOT pins. If high efficiency is desired, RBOOT and CBOOT pins can
be shorted. This short must be placed as close as possible to RBOOT and CBOOT pins as possible.
• Place the feedback divider as close as possible to the FB pin of the device: Place RFBB, RFBT, and CFF, if
used, physically close to the device. The connections to FB and AGND through RFBB must be short and close
to those pins on the device. The connection to VOUT can be somewhat longer. However, this latter trace must
not be routed near any noise source (such as the SW node) that can capacitively couple into the feedback
path of the converter.
• Layer 2 of the PCB must be a ground plane: This plane acts as a noise shield and a heat dissipation path.
Using layer 2 reduces the inclosed area in the input circulating current in the input loop, reducing inductance.
• Provide wide paths for VIN, VOUT, and GND: These paths must be wide and direct as possible to reduce any
voltage drops on the input or output paths of the converter and maximizes efficiency.
• Provide enough PCB area for proper heat sinking: Enough copper area must be used to ensure a low RθJA,
commensurate with the maximum load current and ambient temperature. Make the top and bottom PCB
layers with two-ounce copper and no less than one ounce. If the PCB design uses multiple copper layers
(recommended), thermal vias can also be connected to the inner layer heat-spreading ground planes. Note
that the package of this device dissipates heat through all pins. Wide traces must be used for all pins except
where noise considerations dictate minimization of area.
• Keep switch area small: Keep the copper area connecting the SW pin to the inductor as short and wide as
possible. At the same time, the total area of this node must be minimized to help reduce radiated EMI.
LMQ61460
SNVSBR8A – JULY 2020 – REVISED AUGUST 2020
www.ti.com
46
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