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IMX8MNCEC Scheda tecnica(PDF) 81 Page - NXP Semiconductors

Il numero della parte IMX8MNCEC
Spiegazioni elettronici  i.MX 8M Nano Applications Processor Datasheet for Consumer Products
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Produttore elettronici  NXP [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo NXP - NXP Semiconductors

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Package information and contact assignments
i.MX 8M Nano Applications Processor Datasheet for Consumer Products, Rev. 0.1, 03/2020
NXP Semiconductors
81
5.1.3
i.MX 8M Nano 14 x 14 mm 0.5 mm pitch ball map
Table 66 shows the i.MX 8M Nano 14 x 14 mm 0.5 mm pitch ball map.
SD2_WP
AA27
NVCC_SD2
GPIO
ALT5
GPIO2.IO[20]
Input with PD
SPDIF_EXT_CLK
AF8
NVCC_SAI3
GPIO
ALT5
GPIO5.IO[5]
Input with PD
SPDIF_RX
AG9
NVCC_SAI3
GPIO
ALT5
GPIO5.IO[4]
Input with PD
SPDIF_TX
AF9
NVCC_SAI3
GPIO
ALT5
GPIO5.IO[3]
Input with PD
TSENSOR_TEST_
OUT
J23
VDD_ANA1_1P8
ANALOG
Output low
TSENSOR_REST_
EXT
J24
VDD_ANA1_1P8
ANALOG
UART1_RXD
E14
NVCC_UART
GPIO
ALT5
GPIO5.IO[22]
Input with PD
UART1_TXD
F13
NVCC_UART
GPIO
ALT5
GPIO5.IO[23]
Input with PD
UART2_RXD
F15
NVCC_UART
GPIO
ALT5
GPIO5.IO[24]
Input with PD
UART2_TXD
E15
NVCC_UART
GPIO
ALT5
GPIO5.IO[25]
Input with PD
UART3_RXD
E18
NVCC_UART
GPIO
ALT5
GPIO5.IO[26]
Input with PD
UART3_TXD
D18
NVCC_UART
GPIO
ALT5
GPIO5.IO[27]
Input with PD
UART4_RXD
F19
NVCC_UART
GPIO
ALT5
GPIO5.IO[28]
Input with PD
UART4_TXD
F18
NVCC_UART
GPIO
ALT5
GPIO5.IO[29]
Input with PD
USB1_DN
A22
VDD_USB_3P3
PHY
Input
USB1_DP
B22
VDD_USB_3P3
PHY
Input
USB1_ID
D22
VDD_USB_1P8
PHY
Input
USB1_TXRTUNE
E19
VDD_USB_1P8
PHY
USB1_VBUS
F22
VDD_USB_3P3
PHY
1 During reset: output high without PU/PD; After reset: input with PU
2 Mandatory requirement: JTAG_TMS pin must be connected with a 50 ohm serial resistor near the component.
3 During reset: input without PU/PD; After reset: input with PD
Table 65. i.MX 8M Nano 14 x 14 mm functional contact assignments (continued)
Ball name
Ball
Power group
Ball type
Reset condition
Default
mode
Default function
Input/
Output
status


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