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PCA9450 Scheda tecnica(PDF) 20 Page - NXP Semiconductors |
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PCA9450 Scheda tecnica(HTML) 20 Page - NXP Semiconductors |
20 / 96 page NXP Semiconductors PCA9450 Power management IC for i.MX 8M application processor family PCA9450 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2019. All rights reserved. Product data sheet Rev. 1.0 — 19 November 2019 20 / 96 aaa-035715 PHY_0P9 LDO4 VDD_DRAM VDD_G/VPU BUCK3 VDD_SOC VDDA_1P8 VDDA_DRAM NVCC_1V8 NVCC_3V3 NVCC_DRAM POR_B BUCK1 LDO3 BUCK5 BUCK4 BUCK6 Warm Reset source VDD_ARM BUCK2 NVCC_SD2 LDO5 RUN/ STANDBY Mode Reset RUN/ STANDBY All regulator output goes to default voltage tRESET Figure 13. Warm reset Table 13. tRESET Time Description Value tRESET POR_B low time at Warm reset 20 ms 7.5 Regulator control in each power mode Table 14 shows PCA9450A regulator ON/OFF control in each power mode by default. It can be reconfigured through I2C registers. Table 14. PCA9450A Regulator Control summary Power Rail Default Voltage OFF SNVS STANDBY RUN LDO1 NVCC_SNVS 1.8 V OFF ON ON ON LDO2 VDD_SNVS 0.85 V OFF ON ON ON BUCK1 VDD_SOC 0.85 V OFF OFF ON ON BUCK3 VDD_DRAM VDD_GPU VDD_ VPU 0.85 V OFF OFF ON ON LDO4 PHY_0P9 0.9 V OFF OFF ON ON |
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