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LC75348M Scheda tecnica(PDF) 11 Page - Sanyo Semicon Device |
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LC75348M Scheda tecnica(HTML) 11 Page - Sanyo Semicon Device |
11 / 21 page No. 7308 -11/21 LC75348, 75348M Continued from preceding page. Pin No. Pin Function Notes • 1/2 VDD voltage generator used for the analog system ground A capacitor of about 10 µF must be connected between Vref and AVSS (VSS) to minimize power supply ripple. 28 Vref VDD • Ground 3 VSS VDD • Power supply 29 VDD VDD VDD • Time setting for the zero cross circuit no signal state time. If no zero cross is recognized between the time the data is stored and the time this timer completes, the data is acquired forcibly. 27 TIM • Chip enable Data is written to the internal latch and the analog switches operate when this pin goes from high to low. Data transfers are enabled when this pin is high. 2 CE • Inputs for the clock and serial data signals used to control this IC 1 30 DI CL • Electronic volume control test pin. This pin must be tied to the VSS level. 4 TEST • Unused (no connection) pins. These pins must be either left open or tied to VSS. 15 16 NC |
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