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TLV751 Scheda tecnica(PDF) 16 Page - Texas Instruments

Il numero della parte TLV751
Spiegazioni elettronici  TLV751 Dual, 500-mA, High-Accuracy, LDO in a Small-Size Package
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Produttore elettronici  TI1 [Texas Instruments]
Homepage  http://www.ti.com
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TLV751 Scheda tecnica(HTML) 16 Page - Texas Instruments

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IN
OUT
GND
EN
½
TLV751P
V
OUT
V
IN
FB
C
IN
C
OUT
V
EN
R
2
R
1
16
TLV751
SBVS385B – DECEMBER 2019 – REVISED APRIL 2020
www.ti.com
Product Folder Links: TLV751
Submit Documentation Feedback
Copyright © 2019–2020, Texas Instruments Incorporated
8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
8.1 Application Information
8.1.1 Adjustable Device Feedback Resistors
Figure 38 shows that the output voltage of the TLV751 can be adjusted from 0.55 V to 5.5 V by using a resistor
divider network.
Figure 38. Adjustable Operation
The adjustable-version device requires external feedback divider resistors to set the output voltage. VOUT is set
using the feedback divider resistors, R1 and R2, according to the following equation:
VOUT = VFB × (1 + R1 / R2)
(2)
For this device, VFB = 0.55 V.
To ignore the FB pin current error term in the VOUT equation, set the feedback divider current to 100x the FB pin
current listed in the Electrical Characteristics table. This setting provides the maximum feedback divider series
resistance, as shown in the following equation:
R1 + R2 ≤ VOUT / (IFB × 100)
(3)
For this device, IFB = 10 nA.
8.1.2 Input and Output Capacitor Selection
The TLV751 requires an output capacitance of 0.47 µF or larger for stability. Use X5R- and X7R-type ceramic
capacitors because these capacitors have minimal variation in value and equivalent series resistance (ESR) over
temperature. When choosing a capacitor for a specific application, pay attention to the dc bias characteristics for
the capacitor. Higher output voltages cause a significant derating of the capacitor. For best performance, the
maximum recommended output capacitance is 220 µF.
Although an input capacitor is not required for stability, good analog design practice is to connect a capacitor
from IN to GND. Some input supplies have a high impedance, thus placing the input capacitor on the input
supply helps reduce the input impedance. This capacitor counteracts reactive input sources and improves
transient response, input ripple, and PSRR. If the input supply has a high impedance over a large range of
frequencies, several input capacitors can be used in parallel to lower the impedance over frequency. Use a
higher-value capacitor if large, fast, rise-time load transients are anticipated, or if the device is located several
inches from the input power source.


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