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FAN6520AMX Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor

Il numero della parte FAN6520AMX
Spiegazioni elettronici  Single Synchronous Buck PWM Controller
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

FAN6520AMX Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor

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REV. 1.0.2 8/26/04
FAN6520A
PRODUCT SPECIFICATION
Pin Configuration
FAN6520AM 8-pin SOIC Package
Pin Definitions
Pin #
Pin Name
Pin Function Description
1
BOOT
Bootstrap Supply Input. Provides a boosted voltage to the high-side MOSFET driver.
Connect to bootstrap capacitor as shown in Figure 1.
2
HDRV
High Side Gate Drive Output. Connect to the gate of the high-side power MOSFET(s).
This pin is also monitored by the adaptive shoot-through protection circuitry to determine
when the upper MOSFET has turned off.
3
GND
Ground. The signal and power ground for the IC. Tie this pin to the ground island/plane
through the lowest impedance connection available. Connect directly to source of low-side
MOSFET(s).
4
LDRV
Low Side Gate Drive Output. Connect to the gate of the low-side power MOSFET(s).
This pin is also monitored by the adaptive shoot-through protection circuitry to determine
when the lower MOSFET has turned off.
5
VCC
VCC. Provides bias power to the IC and the drive voltage for LDRV. Bypass with a ceramic
capacitor as close to this pin as possible.
6FB
Feedback. This pin is the inverting input of the internal error amplifier. Use this pin, in
combination with the COMP/OCSET pin, to compensate the voltage-control feedback loop
of the converter.
7
COMP/
OCSET/SD
COMP/OCSET/SD. This is a multiplexed pin. During operation, the output of the error
amplifier drives this pin. During a short period of time following power-on reset (POR), this
pin is used to determine the over-current threshold of the converter. Pulling COMP/OCSET
to a level below 0.8V disables the controller. Disabling the controller causes the oscillator
to stop, the HDRV and LDRV outputs to be held low, and the soft-start circuitry to re-arm.
8SW
Switch Node Input. Connect as shown in Figure 1. The SW pin provides return for the
high-side bootstrapped driver, is a sense point for the adaptive shoot-thru protection, and
is used for monitoring the drop across Q1’s RDS(ON) for current limit.
FAN6520A
1
2
3
4
8
7
6
5
SW
COMP/OCSET/SD
FB
VCC
BOOT
HDRV
GND
LDRV


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