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MC33065P-H Scheda tecnica(PDF) 7 Page - ON Semiconductor |
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MC33065P-H Scheda tecnica(HTML) 7 Page - ON Semiconductor |
7 / 14 page MC34065–H, L MC33065–H, L 7 MOTOROLA ANALOG IC DEVICE DATA Undervoltage Lockout Two Undervoltage Lockout comparators have been incorporated to guarantee that the IC is fully functional before the output stages are enabled. The positive power supply terminal (VCC) and the reference output (Vref) are each monitored by separate comparators. Each has built–in hysteresis to prevent erratic output behavior as their respective thresholds are crossed. The VCC comparator upper and lower thresholds are 14 V/10 V for –H suffix, and 8.4 V/7.6 V for –L suffix. The Vref comparator upper and lower thresholds are 3.6 V/3.4 V respectively. The large hysteresis and low startup current of the –H suffix version makes it ideally suited in off–line converter applications where efficient bootstrap startup techniques are required (Figure 28). The –L suffix version is intended for lower voltage dc–to–dc converter applications. The minimum operating voltage for the –H suffix is 11 V and 8.2 V for the –L suffix. Drive Outputs and Drive Ground Each section contains a single totem–pole output stage that is specifically designed for direct drive of power MOSFETs. The Drive Outputs are capable of up to ±400 mA peak current with a typical rise and fall time of 50 ns with a 1.0 nF load. Additional internal circuitry has been added to keep the outputs in a sinking mode whenever an Undervoltage Lockout is active. This characteristic eliminates the need for an external pull–down resistor. The totem–pole output has been optimized to minimize cross–conduction current in high speed operation. The addition of two 10 Ω resistors, one in series with the source output transistor and one in series with the sink output transistor, reduces the cross–conduction current to minimal levels, as shown in Figure 13. Although the Drive Outputs were optimized for MOSFETs, they can easily supply the negative base current required by bipolar NPN transistors for enhanced turn–off (Figure 25). Figure 15. Representative Block Diagram + – – + – + + – + – – + – + 12 13 14 5 4 2 3 1 15 7 6 10 11 Vref Sync Input RT CT Voltage Feedback 1 Compensation 1 Enable Input Voltage Feedback 2 Compensation 2 Vin = 15V VCC 16 Q2 RS Current Sense 2 Drive Output 2 Current Sense 1 Drive Output 1 RS Q1 10 10 10 10 Gnd 8 Drive Gnd 9 = Sink Only Positive True Logic 1.0V R S Q R R PWM Latch 2 S R Q Current Sense Comparator 2 2R Error Amp 2 Error Amp 1 Vref 250 µA 1.0mA 1.0V R 1.0mA Oscillator 3.6V + – 20k Internal Bias Reference Regulator R R 2.5V PWM Latch 1 VCC UVLO + – Current Sense Comparator 1 Vref UVLO 2R |
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