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74AUP1G79 Scheda tecnica(PDF) 2 Page - NXP Semiconductors

Il numero della parte 74AUP1G79
Spiegazioni elettronici  Low-power D-type flip-flop; positive-edge trigger
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Produttore elettronici  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
Logo PHILIPS - NXP Semiconductors

74AUP1G79 Scheda tecnica(HTML) 2 Page - NXP Semiconductors

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9397 750 14682
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
Product data sheet
Rev. 01 — 12 September 2005
2 of 20
Philips Semiconductors
74AUP1G79
Low-power D-type flip-flop; positive-edge trigger
3.
Quick reference data
[1]
CPD is used to determine the dynamic power dissipation (PD in µW).
PD =CPD × VCC2 × fi × N+ Σ(CL × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in V;
N = number of inputs switching;
Σ(C
L × VCC
2
× f
o) = sum of the outputs.
4.
Ordering information
5.
Marking
Table 1:
Quick reference data
GND = 0 V; Tamb =25 °C; tr =tf ≤ 3ns.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
tPHL, tPLH propagation delay
CP to Q
CL = 5 pF; RL =1MΩ
VCC = 0.8 V
-
19.7
-
ns
VCC = 1.1 V to 1.3 V
2.6
5.5
11.0
ns
VCC = 1.4 V to 1.6 V
2.0
3.8
7.0
ns
VCC = 1.65 V to 1.95 V
1.7
3.1
5.4
ns
VCC = 2.3 V to 2.7 V
1.4
2.3
4.0
ns
VCC = 3.0 V to 3.6 V
1.2
2.0
3.4
ns
fclk(max)
maximum clock
frequency
CL =30pF;
VCC = 3.0 V to 3.6 V
-
309
-
MHz
Ci
input capacitance
-
0.8
-
pF
CPD
power dissipation
capacitance
f = 10 MHz;
VI = GND to VCC
[1]
VCC = 1.8 V
-
2.3
-
pF
VCC = 3.3 V
-
3.0
-
pF
Table 2:
Ordering information
Type number
Package
Temperature range
Name
Description
Version
74AUP1G79GW
−40 °C to +125 °C
TSSOP5
plastic thin shrink small outline package; 5 leads;
body width 1.25 mm
SOT353-1
74AUP1G79GM
−40 °C to +125 °C
XSON6
plastic extremely thin small outline package; no leads;
6 terminals; body 1
× 1.45 × 0.5 mm
SOT886
Table 3:
Marking
Type number
Marking code
74AUP1G79GW
pP
74AUP1G79GM
pP


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