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MC10153 Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC10153 Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 5 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 3–52 REV 5 © Motorola, Inc. 1996 3/93 Quad Latch The MC10153 is a high speed, low power, MECL quad latch consisting of four bistable latch circuits with D type inputs and gated Q outputs. Open emitters allow a large number of outputs to be wire-ORed together. Latch outputs are gated, allowing direct wiring to a bus. When the clock is low, outputs will follow D inputs. Information is latched on positive going transition of the clock. The MC10153 provides the same logic function as the MC10133, except for inversion of the clock. PD = 310 mW typ/pkg (No Load) tpd = 4.0 ns typ tr, tf = 2.0 ns typ (20%–80%) LOGIC DIAGRAM VCC1 = PIN 1 VCC2 = PIN 16 VEE = PIN 8 Q0 Q1 Q2 Q3 3 D0 2Q0 5 G0 7 D1 4 CE 13 CC 12 CE 9 D2 14 D3 6Q1 11 Q2 15 Q3 10 G1 TRUTH TABLE G C D Qn+1 H X X L L H X Qn L L L L L L H H C = CC + CE MC10153 DIP PIN ASSIGNMENT VCC1 Q0 D0 CE G0 Q1 D1 VEE VCC2 Q3 D3 CC CE Q2 G1 D2 16 15 14 13 12 11 10 9 1 2 3 4 5 6 7 8 Pin assignment is for Dual–in–Line Package. For PLCC pin assignment, see the Pin Conversion Tables on page 6–11 of the Motorola MECL Data Book (DL122/D). L SUFFIX CERAMIC PACKAGE CASE 620–10 P SUFFIX PLASTIC PACKAGE CASE 648–08 FN SUFFIX PLCC CASE 775–02 |
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