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MC100LVEL13 Scheda tecnica(PDF) 1 Page - ON Semiconductor |
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MC100LVEL13 Scheda tecnica(HTML) 1 Page - ON Semiconductor |
1 / 3 page MOTOROLA SEMICONDUCTOR TECHNICAL DATA 4–1 REV 1 © Motorola, Inc. 1996 4/95 Dual 1:3 Fanout Buffer The MC100LVEL13 is a dual, fully differential 1:3 fanout buffer. The MC100EL13 is pin and functionally equivalent to the MC100LVEL13 but is specified for operation at the standard 100E ECL voltage supply. The Low Output–Output Skew of the device makes it ideal for distributing two different frequency synchronous signals. The differential inputs have special circuitry which ensures device stability under open input conditions. When both differential inputs are left open the D input will pull down to VEE, The D input will bias around VCC/2 and the Q output will go LOW. • Differential Inputs and Outputs • 20–Lead SOIC Packaging • 500ps Typical Propagation Delays • 50ps Output–Output Skews • Supports Both Standard and Low Voltage 100K ECL • >2000V ESD Protection CLKa Logic Diagram and Pinout: 20–Lead SOIC (Top View) CLKa CLKb VCC 17 18 16 15 14 13 12 4 3 5678 9 Q2a 11 10 Q2a VCC Q2b Q2b Q1b Q1b VEE Q0a 19 20 2 1 Q1a Q1a VCC CLKb Q0a Q0b Q0b MC100LVEL13 DC CHARACTERISTICS (VEE = –3.0V to –3.8V; VCC = GND) –40 °C 0 °C 25 °C 85 °C Symbol Characteristic Min Typ Max Min Typ Max Min Typ Max Min Typ Max Unit IEE Power Supply Current 30 38 30 38 30 38 32 40 mA IIH Input HIGH Current 150 150 150 150 µA IINL Input LOW Current Dn Dn 0.5 –300 0.5 –300 0.5 –300 0.5 –300 µA MC100LVEL13 MC100EL13 DW SUFFIX PLASTIC SOIC PACKAGE CASE 751D–04 1 20 PIN NAMES Function Differential Clock Outputs Differential Clock Outputs Differential Clock Inputs Pins Qna, Qna Qnb, Qnb CLKn, CLKn |
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