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SN74AUC1G79 Scheda tecnica(PDF) 1 Page - Texas Instruments

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Il numero della parte SN74AUC1G79
Spiegazioni elettronici  SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
Download  13 Pages
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Produttore elettronici  TI [Texas Instruments]
Homepage  http://www.ti.com
Logo TI - Texas Instruments

SN74AUC1G79 Scheda tecnica(HTML) 1 Page - Texas Instruments

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FEATURES
DBV OR DCK PACKAGE
(TOP VIEW)
1
2
3
5
4
D
CLK
GND
VCC
Q
3
2
1
4
5
GND
CLK
D
Q
VCC
YEA, YEP, YZA, OR YZP PACKAGE
(BOTTOM VIEW)
DESCRIPTION/ORDERING INFORMATION
SN74AUC1G79
SINGLE POSITIVE-EDGE-TRIGGERED D-TYPE FLIP-FLOP
SCES387H – MARCH 2002 – REVISED JUNE 2005
Available in the Texas Instruments
NanoStar™ and NanoFree™ Packages
Optimized for 1.8-V Operation and Is 3.6-V I/O
Tolerant to Support Mixed-Mode Signal
Operation
Ioff Supports Partial-Power-Down Mode
Operation
Sub-1-V Operable
Max tpd of 1.9 ns at 1.8 V
Low Power Consumption, 10-
µA Max I
CC
±8-mA Output Drive at 1.8 V
Latch-Up Performance Exceeds 100 mA Per
JESD 78, Class II
ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This single positive-edge-triggered D-type flip-flop is operational at 0.8-V to 2.7-V VCC, but is designed
specifically for 1.65-V to 1.95-V VCC operation.
When data at the data (D) input meets the setup time requirement, the data is transferred to the Q output on the
positive-going edge of the clock pulse. Clock triggering occurs at a voltage level and is not directly related to the
rise time of the clock pulse. Following the hold-time interval, data at the D input can be changed without affecting
the levels at the outputs.
NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the
die as the package.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs,
preventing damaging current backflow through the device when it is powered down.
ORDERING INFORMATION
TA
PACKAGE(1)
ORDERABLE PART NUMBER
TOP-SIDE MARKING(2)
NanoStar™
SN74AUC1G79YEAR
WCSP (DSBGA) – YEA
NanoFree™
SN74AUC1G79YZAR
WCSP (DSBGA) – YZA (Pb-free)
Tape and reel
_ _ _UR_
NanoStar™ – WCSP (DSBGA)
SN74AUC1G79YEPR
–40°C to 85°C
0.23-mm Large Bump – YEP
NanoFree™ – WCSP (DSBGA)
SN74AUC1G79YZPR
0.23-mm Large Bump – YZP (Pb-free)
SOT (SOT-23) – DBV
Tape and reel
SN74AUC1G79DBVR
U79_
SOT (SC-70) – DCK
Tape and reel
SN74AUC1G79DCKR
UR_
(1)
Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at
www.ti.com/sc/package.
(2)
DBV/DCK: The actual top-side marking has one additional character that designates the assembly/test site.
YEA/YZA, YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one
following character to designate the assembly/test site.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas
Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
NanoStar, NanoFree are trademarks of Texas Instruments.
PRODUCTION DATA information is current as of publication date.
Copyright © 2002–2005, Texas Instruments Incorporated
Products conform to specifications per the terms of the Texas
Instruments standard warranty. Production processing does not
necessarily include testing of all parameters.


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