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74ALVC00D Scheda tecnica(PDF) 5 Page - NXP Semiconductors |
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74ALVC00D Scheda tecnica(HTML) 5 Page - NXP Semiconductors |
5 / 16 page 2003 May 14 5 Philips Semiconductors Product specification Quad 2-input NAND gate 74ALVC00 RECOMMENDED OPERATING CONDITIONS LIMITING VALUES In accordance with the Absolute Maximum Rating System (IEC 60134); voltages are referenced to GND (ground = 0 V). Notes 1. The input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. When VCC = 0 V (Power-down mode), the output voltage can be 3.6 V in normal operation. 3. For SO14 packages: above 70 °C derate linearly with 8 mW/K. For TSSOP14 packages: above 60 °C derate linearly with 5.5 mW/K. For DHVQFN14 packages: above 60 °C derate linearly with 4.5 mW/K. SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage 1.65 3.6 V VI input voltage 0 3.6 V VO output voltage VCC = 1.65 to 3.6 V 0 VCC V VCC = 0 V; Power-down mode 0 3.6 V Tamb operating ambient temperature −40 +85 °C tr,tf input rise and fall times VCC = 1.65 to 2.7 V 0 20 ns/V VCC = 2.7 to 3.6 V 0 10 ns/V SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT VCC supply voltage −0.5 +4.6 V IIK input diode current VI <0 −−50 mA VI input voltage −0.5 +4.6 V IOK output diode current VO >VCC or VO <0 −±50 mA VO output voltage notes 1 and 2 −0.5 VCC + 0.5 V Power-down mode; note 2 −0.5 +4.6 V IO output source or sink current VO =0toVCC −±50 mA ICC, IGND VCC or GND current −±100 mA Tstg storage temperature −65 +150 °C Ptot power dissipation per package Tamb = −40 to +125 °C; note 3 − 500 mW |
Codice articolo simile - 74ALVC00D |
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Descrizione simile - 74ALVC00D |
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