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High Speed Super Low Power SRAM
256K-Word By 8 Bit
CS18LV20483
8
Rev. 1.0
Chiplus reserves the right to change product or specification without notice.
AC TEST LOADS AND WAVEFORMS
FIGURE 1A
FIGURE 1B
667
Ω
TERMINAL EQUIVALENT
OUTPUT
1.73V
GND
V
CC
5ns
5ns
10%
90%
90%
10%
ALL INPUT PULSES
FIGURE 2
AC ELECTRICAL CHARACTERISTICS ( TA = 0 to + 70oC , Vcc = 3.3V )
< READ CYCLE >
-55
-70
JEDEC
Parameter
Name
Parameter
Name
Description
MIN MAX MIN MAX
Unit
tAVAX
tRC
Read Cycle Time
55
70
ns
tAVQV
tAA
Address Access Time
55
70
ns
tELQV
tCO
Chip Select Access Time
55
70
ns
tGLQV
tOE
Output Enable to Output Valid
25
35
ns
tELQX
tLZ
Chip Select to Output Low Z
10
10
ns
tGLQX
tOLZ
Output Enable to Output in Low Z
5
5
ns
tEHQZ
tCHZ
Chip Deselect to Output in High Z
0
20
0
25
ns
tGHQZ
tOHZ
Output Disable to Output in High Z
0
20
0
25
ns
tAXOX
tOH
Out Disable to Address Change
10
10
ns