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MC7445ARX1000LG Scheda tecnica(PDF) 8 Page - Freescale Semiconductor, Inc |
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MC7445ARX1000LG Scheda tecnica(HTML) 8 Page - Freescale Semiconductor, Inc |
8 / 64 page MPC7455 RISC Microprocessor Hardware Specifications, Rev. 4.1 8 Freescale Semiconductor Comparison with the MPC7400, MPC7410, MPC7450, MPC7451, and MPC7441 Scalar floating-point unit In Order In Order In Order Branch Processing Resources Prediction structures BTIC, BHT, Link Stack BTIC, BHT, Link Stack BTIC, BHT BTIC size, associativity 128-Entry, 4-Way 128-Entry, 4-Way 64-Entry, 4-Way BHT size 2K-Entry 2K-Entry 512-Entry Link stack depth 8 8 None Unresolved branches supported 3 3 2 Branch taken penalty (BTIC hit) 1 1 0 Minimum misprediction penalty 6 6 4 Execution Unit Timings (Latency-Throughput) Aligned load (integer, float, vector) 3-1, 4-1, 3-1 3-1, 4-1, 3-1 2-1, 2-1, 2-1 Misaligned load (integer, float, vector) 4-2, 5-2, 4-2 4-2, 5-2, 4-2 3-2, 3-2, 3-2 L1 miss, L2 hit latency 9 Data/13 Instruction 9 Data/13 Instruction 9 (11) 1 SFX (aDd Sub, Shift, Rot, Cmp, logicals) 1-1 1-1 1-1 Integer multiply (32 × 8, 32 × 16, 32 × 32) 3-1, 3-1, 4-2 3-1, 3-1, 4-2 2-1, 3-2, 5-4 Scalar float 5-1 5-1 3-1 VSFX (vector simple) 1-1 1-1 1-1 VCFX (vector complex) 4-1 4-1 3-1 VFPU (vector float) 4-1 4-1 4-1 VPER (vector permute) 2-1 2-1 1-1 MMUs TLBs (instruction and data) 128-Entry, 2-Way 128-Entry, 2-Way 128-Entry, 2-Way Tablewalk mechanism Hardware + Software Hardware + Software Hardware Instruction BATs/data BATs 8/8 4/4 4/4 L1 I Cache/D Cache Features Size 32K/32K 32K/32K 32K/32K Associativity 8-Way 8-Way 8-Way Locking granularity Way Way Full Cache Parity on I cache Word Word None Parity on D cache Byte Byte None Number of D cache misses (load/store) 5/1 5/1 8 (Any Combination) Data stream touch engines 4 Streams 4 Streams 4 Streams On-Chip Cache Features Table 1. Microarchitecture Comparison (continued) Microarchitectural Specs MPC7455/MPC7445 MPC7450/MPC7451/ MPC7441 MPC7400/MPC7410 |
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