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DCT OR DCU PACKAGE

(TOP VIEW)

1

2

3

4

8

7

6

5

1OE

1A

2Y

GND

2OE

1Y

2A

4

3

2

1

5

6

7

8

GND

2Y

1A

1OE

2A

1Y

2OE

YEP OR YZP PACKAGE

(BOTTOM VIEW)

DESCRIPTION/ORDERING INFORMATION

SN74AUC2G241

DUAL BUFFER/DRIVER

WITH 3-STATE OUTPUTS

SCES535A – DECEMBER 2003 – REVISED MARCH 2005

•

Available in the Texas Instruments

NanoStar™ and NanoFree™ Packages

•

Optimized for 1.8-V Operation and Is 3.6-V I/O

Tolerant to Support Mixed-Mode Signal

Operation

•

Operation

•

Sub-1-V Operable

•

•

Low Power Consumption, 10

µA at 1.8 V

•

±8-mA Output Drive at 1.8 V

•

Latch-Up Performance Exceeds 100 mA Per

JESD 78, Class II

•

ESD Protection Exceeds JESD 22

– 2000-V Human-Body Model (A114-A)

– 200-V Machine Model (A115-A)

– 1000-V Charged-Device Model (C101)

operation.

The SN74AUC2G241 is designed specifically to improve the performance and density of 3-state memory

address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device is organized as two 1-bit line drivers with separate output-enable (1OE, 2OE) inputs. When 1OE is

low or 2OE is high, the device passes data from the A inputs to the Y outputs. When 1OE is high or 2OE is low,

the outputs are in the high-impedance state.

NanoStar™ and NanoFree™ package technology is a major breakthrough in IC packaging concepts, using the

die as the package.

ORDERING INFORMATION

ORDERABLE PART NUMBER

NanoStar™ – WCSP (DSBGA)

Tape and reel

SN74AUC2G241YEPR

0.23-mm Large Bump – YEP

_ _ _U2_

NanoFree™ – WCSP (DSBGA)

Tape and reel

SN74AUC2G241YZPR

–40°C to 85°C

0.23-mm Large Bump – YZP (Pb-free)

SSOP – DCT

Tape and reel

SN74AUC2G241DCTR

U41_ _ _

VSSOP – DCU

Tape and reel

SN74AUC2G241DCUR

U2_

(1)

Package drawings, standard packing quantities, thermal data, symbolization, and PCB design guidelines are available at

www.ti.com/sc/package.

(2)

DCT: The actual top-side marking has three additional characters that designate the year, month, and assembly/test site.

DCU: The actual top-side marking has one additional character that designates the assembly/test site.

YEP/YZP: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following

character to designate the assembly/test site. Pin 1 identifier indicates solder-bump composition (1 = SnPb,

⋅ = Pb-free).

Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas

Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.

NanoStar, NanoFree are trademarks of Texas Instruments.

PRODUCTION DATA information is current as of publication date.

Copyright © 2003–2005, Texas Instruments Incorporated

Products conform to specifications per the terms of the Texas

Instruments standard warranty. Production processing does not

necessarily include testing of all parameters.