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MC2DU016HBCB-0QC00 Scheda tecnica(PDF) 22 Page - Samsung semiconductor |
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MC2DU016HBCB-0QC00 Scheda tecnica(HTML) 22 Page - Samsung semiconductor |
22 / 66 page MultiMediaCard TM 22 4.5.3 Relative Card Address (RCA) The 16-bit relative card address register carries the card address assigned by the host during the card identification. This address is used for the addressed host to card communication after the card identification procedure. The default value of the RCA register is 0x0001. The value 0x0000 is reserved to set all cards in Standby State with the command SELECT_DESELECT_CARD (CMD7). The RCA is programmed with the command SET_RELATIVE_ADDRESS (CMD3) during the initialization procedure. The content of this register is lost after power down. The default value is assigned when an internal reset is applied by the power up detection unit of the MultiMediaCard. 4.5.4 Card Specific Data (CSD) The card specific data register describes how to access the card content. The CSD defines card operating parameters like maximum data access time, data transfer speed. Table 4-7 CSD Field Name Field Width CSD-slice Value Type CSD structure CSD_STRUCTURE 2 [127:126] 0x2 read only Spec version SPEC_VERS 4 [125:122] 0x3 read only Reserved -- 2 [121:120] 0x0 read only Data read access- time-1 TAAC 8 [119:112] 0×26 (1.5 ms) read only Data read access- time-2 in CLK cycles NAC *100) NSAC 8 [111:104] 0×01 (100 cycles) read only Max. data transfer rate TRAN_SPEED 8 [103:96] 0×2A (20MHz,Max) read only Card command classes CCC 12 [95:84] 0×0F5 (Class 0,2,4,5, 6, 7) read only Max. read data block length READ_BL_LEN 4 [83:80] 0×9(512 bytes) read only Partial blocks for read allowed READ_BL_PARTIAL 1 [79:79] 0x0(Disabled) read only Write block misalignment WRITE_BLK_MISALIGN 1 [78:78] 0x0(Disabled) read only Read block misalignment READ_BLK_MISALIGN 1 [77:77] 0x0 (Disabled) read only DSR implemented DSR_IMP 1 [76:76] 0x0 (Disabled) read only Reserved -- 2 [75:74] 0x0 read only Device size C_SIZE 12 [73:62] *1 read only Max. read current at VDD min VDD_R_CURR_MIN 3 [61:59] *2 read only Max. read current at VDD max VDD_R_CURR_MAX 3 [58:56] *2 read only Max. write current at VDD min VDD_W_CURR_MIN 3 [55:53] *2 read only Max. write current at VDD max VDD_W_CURR_MAX 3 [52:50] *2 read only |
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