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TL16C550DPT Scheda tecnica(PDF) 7 Page - Texas Instruments |
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TL16C550DPT Scheda tecnica(HTML) 7 Page - Texas Instruments |
7 / 50 page TL16C550D, TL16C550DI ASYNCHRONOUS COMMUNICATIONS ELEMENT WITH AUTOFLOW CONTROL SLLS597C − APRIL 2004 − REVISED JUNE 2005 7 POST OFFICE BOX 655303 • DALLAS, TEXAS 75265 functional block diagram (for RHB package) Receiver Buffer Register Divisor Latch (LS) Divisor Latch (MS) Baud Generator Receiver FIFO Line Status Register Transmitter Holding Register Modem Control Register Modem Status Register Line Control Register Transmitter FIFO Interrupt Enable Register Interrupt Identification Register FIFO Control Register Select and Control Logic Interrupt Control Logic S e l e c t Data Bus Buffer SIN SOUT CTS DTR DSR DCD RI INTRPT 24 22 25 26 27 20 7 6 A0 19 D(7 − 0) 5−3, 1 32−29 Internal Data Bus 18 17 8 23 14 12 10 11 A1 A2 CS2 MR RD1 WR1 XIN XOUT S e l e c t Receiver Shift Register Receiver Timing and Control Transmitter Timing and Control Transmitter Shift Register Modem Control Logic 8 28 13 VCC VSS Power Supply RTS 21 Autoflow Control (AFE) 8 8 8 8 8 8 8 |
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