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RT5047BF Scheda tecnica(PDF) 14 Page - Richtek Technology Corporation |
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RT5047BF Scheda tecnica(HTML) 14 Page - Richtek Technology Corporation |
14 / 17 page RT5047BF Copyright © 2017 Richtek Technology Corporation. All rights reserved. is a registered trademark of Richtek Technology Corporation. www.richtek.com DS5047BF-00 December 2017 14 Inrush Current At start-up or during a LNB reconfiguration event, a transient surge current above the normal DC operating level can be provided by the IC. This current increase can be as high as 550mA, typical, for as long as required, up to a maximum of 6ms. DC Current The RT5047BF can handle up to 500mA during continuous operation. Thermal Considerations The junction temperature should never exceed the absolute maximum junction temperature TJ(MAX), listed under Absolute Maximum Ratings, to avoid permanent damage to the device. The maximum allowable power dissipation depends on the thermal resistance of the IC package, the PCB layout, the rate of surrounding airflow, and the difference between the junction and ambient temperatures. The maximum power dissipation can be calculated using the following formula : PD(MAX) = (TJ(MAX) - TA) / JA where TJ(MAX) is the maximum junction temperature, TA is the ambient temperature, and JA is the junction-to-ambient thermal resistance. For continuous operation, the maximum operating junction temperature indicated under Recommended Operating Conditions is 125°C. The junction-to-ambient thermal resistance, JA, is highly package dependent. For a SOP-8 (Exposed Pad) package, the thermal resistance, JA, is 29°C/W on a standard JEDEC 51-7 high effective-thermal-conductivity four-layer test board. The maximum power dissipation at TA = 25°C can be calculated as below : PD(MAX) = (125°C - 25°C) / (29°C/W) = 3.44W for a SOP-8 (Exposed Pad) package. The maximum power dissipation depends on the operating ambient temperature for the fixed TJ(MAX) and the thermal resistance, JA. The derating curves in Figure 3 allows the designer to see the effect of rising ambient temperature on the maximum power dissipation. Figure 3. Derating Curve of Maximum Power Dissipation Layout Consideration For high frequency switching power supplies, the PCB layout is important to get good regulation, high efficiency and stability. The following descriptions are the guidelines for better PCB layout. For good regulation, place the power components as close as possible. The traces should be wide and short enough especially for the high-current loop. Minimize the size of the LX node and keep it wide and shorter. The exposed pad of the chip should be connected to a strong ground plane for maximum thermal consideration. 0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 0 25 50 75 100 125 Ambient Temperature (°C) Four-Layer PCB |
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