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74AHCT377PW Scheda tecnica(PDF) 11 Page - NXP Semiconductors |
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74AHCT377PW Scheda tecnica(HTML) 11 Page - NXP Semiconductors |
11 / 20 page 2000 Aug 15 11 Philips Semiconductors Product specification Octal D-type flip-flop with data enable; positive-edge trigger 74AHC377; 74AHCT377 AC WAVEFORMS handbook, full pagewidth MNA608 tPHL tPLH tW 1/fmax VM (2) VM (1) CP input Qn output GND VI VOH VOL Fig.6 The clock (CP) to output (Qn) propagation delays. FAMILY VI INPUT REQUIREMENTS VM(1) INPUT VM(2) OUTPUT AHC GND to VCC 50% VCC 50% VCC AHCT GND to 3.0 V 1.5 V 50% VCC handbook, full pagewidth MNA609 th th stable tsu tsu th tsu tW VM (1) VM (1) VM (1) VCC GND VCC GND VCC GND CP input Dn input E input Fig.7 The data set-up and hold times for Dn input The shaded areas indicate when the input is permitted to change for predicable output performance. FAMILY VI INPUT REQUIREMENTS VM(1) INPUT AHC GND to VCC 50% VCC AHCT GND to 3.0 V 1.5 V |
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