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TD62S310AFM Scheda tecnica(PDF) 3 Page - Toshiba Semiconductor |
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TD62S310AFM Scheda tecnica(HTML) 3 Page - Toshiba Semiconductor |
3 / 6 page TD62S310AFM 2001-12-05 3 Test Circuit 1. ICEX 2. VCE (sat) 3. IIN (ON), ICC 4. VIN (ON), VIN (OFF) 5. tON, tOFF Note 6: Pulse width 50 ms, Duty cycle 10% Output impedance 50 W, tr <= 5 ns, tf <= 10 ns Note 7: CL includes probe and jig capacitance. VCC VIN VCE (sat) IOUT ICC VCC VIN IIN (ON) VCC VIN (ON) VIN (OFF) VCE IOUT ICEX VCC VIN Pulse generator INPUT CL (Note 7) (Note 6) VCC RL 10% 90% 90% 10% 10% 50% 50% tON tOFF tf tr 5 V 0 VOH VOL OUTPUT INPUT 90% 50 ms Caution on Application 1. The device does not include protectors such as an overcurrent protector and an overvoltage protector. Applying excessive current or voltage may damage the device. Thus, design with great care to prevent excessive current or voltage from being applied to the device. The device may also be damaged by short-circuits between outputs and power supply/ground. Take care when designing output, VCC and GND line. 2. If the TD62S310AFM is used to drive an inductive load (such as a motor, solenoid, or relay), Toshiba recommends that the diodes be connected between pin 1 and pin 5 so as to absorb the counter electromotive force generated by the load. Please adhere to the maximum ratings of this device. 3. Be sure to mount the device in the correct orientation. Make sure that the positive and negative power supply pins are connected the right way round. Otherwise, the absolute maximum current and power dissipation ratings may be exceeded and the device may break down or undergo performance degradation, causing it to catch fire or explode, and resulting in injury. |
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