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MC10H125M Scheda tecnica(PDF) 4 Page - ON Semiconductor |
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MC10H125M Scheda tecnica(HTML) 4 Page - ON Semiconductor |
4 / 8 page MC10H125 http://onsemi.com 4 Figure 1. TTL Output Loading Used for Device Evaluation CHARACTERISTIC TEST CL*RL AC TEST LOAD GND *CL includes fixture capacitance APPLICATION TTL RECEIVER APPLICATION INFORMATION The MC10H125 incorporates differential inputs and Schottky TTL “totem pole” outputs. Differential inputs allow for use as an inverting/non-inverting translator or as a differential line receiver. The VBB reference voltage is available on Pin 1 for use in single-ended input biasing. The outputs of the MC10H125 go to a low-logic level whenever the inputs are left floating, and a high-logic output level is achieved with a minimum input level of 150 mVp- p. An advantage of this device is that MECL-level information can be received, via balanced twisted pair lines, in the TTL equipment. This isolates the MECL-logic from the noisy TTL environment. Power supply requirements are ground, +5.0 volts and -5.2 volts. |
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Descrizione simile - MC10H125M |
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