Motore di ricerca datesheet componenti elettronici |
|
LTM8055 Scheda tecnica(PDF) 16 Page - Linear Technology |
|
LTM8055 Scheda tecnica(HTML) 16 Page - Linear Technology |
16 / 26 page LTM8055 16 8055fb For more information www.linear.com/LTM8055 2. Place the CIN capacitor as close as possible to the VIN and GND connection of the LTM8055. 3. Place the COUT capacitor as close as possible to the VOUT and GND connection of the LTM8055. 4. Minimize the trace resistance between the optional outputcurrentsenseresistor,ROUT,andVOUT.Minimize the loop area of the IOUT trace and the trace from VOUT to ROUT. 5. Minimizethetraceresistancebetweentheoptionalinput current sense resistor, RIN and VIN. Minimize the loop area of the IIN trace and the trace from VIN to RIN. 6. Place the CIN and COUT capacitors such that their ground current flow directly adjacent or underneath the LTM8055. 7. Connect all of the GND connections to as large a copper pour or plane area as possible on the top layer. Avoid breaking the ground connection between the external components and the LTM8055. 8. Use vias to connect the GND copper area to the board’s internal ground planes. Liberally distribute these GND vias to provide both a good ground connection and thermal path to the internal planes of the printed circuit board. Pay attention to the location and density of the thermal vias in Figure 6. The LTM8055 can benefit from the heat sinking afforded by vias that connect to internal GND planes at these locations, due to their proximity to internal power handling components. The optimum number of thermal vias depends upon the printed circuit board design. For example, a board might use very small via holes. It should employ more thermal vias than a board that uses larger holes. Hot-Plugging Safely The small size, robustness and low impedance of ceramic capacitors make them an attractive option for the input bypass capacitor of LTM8055. However, these capacitors can cause problems if the LTM8055 is plugged into a live supply (see Linear Technology Application Note 88 for a complete discussion). The low loss ceramic capacitor combined with stray inductance in series with the power source forms an underdamped tank circuit, and the volt- age at the VIN pin of the LTM8055 can ring to more than twice the nominal input voltage, possibly exceeding the LTM8055’sratinganddamagingthepart.Iftheinputsupply is poorly controlled or the LTM8055 is hot-plugged into an energized supply, the input network should be designed APPLICATIONS INFORMATION Figure 6. Layout Showing Suggested External Components, GND Plane and Thermal Vias ROUT OUTPUT SENSE VOUT SIGNAL VIA GND GND/THERMAL VIAS GND INPUT RIN INPUT SENSE 8055 F06 COUT VOUT IOUT VIN CIN SVIN LL RT MODE SYNC RUN FB IIN IOUT VOUT SIGNAL VIA |
Codice articolo simile - LTM8055 |
|
Descrizione simile - LTM8055 |
|
|
Link URL |
Privacy Policy |
ALLDATASHEETIT.COM |
Lei ha avuto il aiuto da alldatasheet? [ DONATE ] |
Di alldatasheet | Richest di pubblicita | contatti | Privacy Policy | scambio Link | Ricerca produttore All Rights Reserved©Alldatasheet.com |
Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
Family Site : ic2ic.com |
icmetro.com |