© Semiconductor Components Industries, LLC, 2004

January, 2004 − Rev. 8

1

Publication Order Number:

MC100EP40/D

MC100EP40

3.3V / 5VECL Differential

Phase−Frequency Detector

The MC100EP40 is a three−state phase−frequency detector

intended for phase−locked loop applications which require a minimum

amount of phase and frequency difference at lock. Advanced design

significantly reduces the dead zone of the detector. For proper

operation, the input edge rate of the R and V inputs should be less than

5 ns. The device is designed to work with a 3.3 V / 5 V power supply.

When Reference (R) and Feedback (FB) inputs are unequal in

frequency and/or phase the differential UP (U) and DOWN (D)

outputs will provide pulse streams which when subtracted and

integrated provide an error voltage for control of a VCO.

When Reference (R) and Feedback (FB) inputs are 80 ps or less in

phase difference, the Phase Lock Detect pin will indicate lock by a

internal termination network for 50

W line impedance environment

W termination resistance that is

compatible with LVDS signal receiver termination. For more

information on termination of logic devices, see AND8020.

this device only. For single-ended input conditions, the unused

mF capacitor and limit current sourcing or sinking

For more information on Phase Lock Loop operation, refer to

AND8040.

Special considerations are required for differential inputs under No

Signal conditions to prevent instability.

MARKING

DIAGRAM

TSSOP−20

DT SUFFIX

CASE 948E

A

= Assembly Location

L

= Wafer Lot

Y

= Year

W

= Work Week

*For additional information, see Application Note

AND8002/D

100

EP40

ALYW

20

1

Device

Package

ORDERING INFORMATION

MC100EP40DT

TSSOP−20

75 Units/Rail

MC100EP40DTR2 TSSOP−20 2500 Tape & Reel

1

20

http://onsemi.com

†For information on tape and reel specifications,

including part orientation and tape sizes, please

refer to our Tape and Reel Packaging Specification

Brochure, BRD8011/D.