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MP1605 Scheda tecnica(PDF) 12 Page - Monolithic Power Systems |
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MP1605 Scheda tecnica(HTML) 12 Page - Monolithic Power Systems |
12 / 18 page MP1605 – 2A, SYNCHRONOUS, STEP-DOWN SWITCHER WITH 11µA IQ MP1605 Rev. 1.0 www.MonolithicPower.com 12 6/17/2016 MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited. © 2016 MPS. All Rights Reserved. OPERATION The MP1605 uses constant on-time control with input voltage feed-forward to stabilize the switching frequency over the full input range. It achieves 2A of output current from a 2.3V to 5.5V input voltage range with excellent load and line regulation. The output voltage can be regulated as low as 0.6V. Constant-On-Time Control Compared to fixed frequency PWM control, constant-on-time control offers a simpler control loop and faster transient response. By using input voltage feed-forward, the MP1605 maintains a nearly constant switching frequency across the input and output voltage ranges. The switching pulse on time can be estimated with Equation (1): OUT ON IN V T 0.454 s V (1) To prevent inductor current runaway during the load transient, the MP1605 has a fixed minimum off time of 60ns. Sleep Mode Operation The MP1605 features sleep mode to achieve high efficiency at extreme light-load. In sleep mode, most of the circuit blocks are turned off except for the error amplifier and PWM comparator. The operation current is reduced to a minimal value (see Figure 2). Bias & Voltage Reference 0.6V FB + + - FBCOMP Soft start E.A. + - + Ramp generator SW Lo-Iq Lo-Iq Figure 2: Operation Blocks at Sleep Mode When the load becomes lighter, the ripple of the output voltage becomes larger and drives the error amplifier output (EAO) lower. When the EAO reaches the internal low threshold, it is clamped at that level, and the MP1605 enters sleep mode. During sleep mode, the valley of the FB voltage is regulated to the internal reference voltage. Therefore, the average output voltage is slightly higher than the output voltage in DCM or CCM. The on-time pulse in sleep mode is around 40% larger than that in DCM or CCM. Figure 3 shows the average FB voltage relationship with the internal reference in sleep mode. FB Vref Average FB Figure 3: FB Average Voltage at Sleep Mode When the MP1605 is in sleep mode, the average output voltage is higher than the internal reference voltage. The EAO is kept low and clamped in sleep mode. When the load increases, the PWM switching period decreases to keep the output voltage regulated, and the output voltage ripple decreases relatively. Once the EAO is higher than the internal low threshold, the MP1605 exits sleep mode and enters DCM or CCM depending on the load. In DCM or CCM, the error amplifier (EA) regulates the average output voltage to the internal reference (see Figure 4). FB+ Ramp EA out Average FB= REF Figure 4: DCM Control There is always a loading hysteresis when entering and exiting sleep mode due to the EA clamping response time. AAM Operation at Light-Load Operation The MP1605 uses advanced asynchronous modulation (AAM) power-save mode with zero- current cross detection (ZCD) circuit for light load. The MP1605 uses AAM power-save mode for light load. The simplified AAM control theory is shown in Figure 5. The AAM current (IAAM) is set internally. The SW on pulse time is determined by the on-time generator and AAM comparator. At light-load condition, the SW on pulse time is longer. If the AAM comparator pulse is longer than the on-time generator, the operation mode is as shown in Figure 6. |
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